HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32913
Change subject: soc/intel/denverton_ns: Remove variable set but not used ......................................................................
soc/intel/denverton_ns: Remove variable set but not used
Change-Id: Ic04231525c1aaaf3afc8c11cddc409b1f5b46743 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/denverton_ns/cpu.c 1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/32913/1
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 2a63171..fc1024a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -38,7 +38,6 @@ static void dnv_configure_mca(void) { msr_t msr; - int num_banks; struct cpuid_result cpuid_regs;
/* Check feature flag in CPUID.(EAX=1):EDX[7]==1 MCE @@ -48,7 +47,6 @@ return;
msr = rdmsr(IA32_MCG_CAP); - num_banks = msr.lo & IA32_MCG_CAP_COUNT_MASK; if (msr.lo & IA32_MCG_CAP_CTL_P_MASK) { /* Enable all error logging */ msr.lo = msr.hi = 0xffffffff;
David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32913 )
Change subject: soc/intel/denverton_ns: Remove variable set but not used ......................................................................
Patch Set 1: Code-Review+1
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32913 )
Change subject: soc/intel/denverton_ns: Remove variable set but not used ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32913 )
Change subject: soc/intel/denverton_ns: Remove variable set but not used ......................................................................
soc/intel/denverton_ns: Remove variable set but not used
Change-Id: Ic04231525c1aaaf3afc8c11cddc409b1f5b46743 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/32913 Reviewed-by: Patrick Georgi pgeorgi@google.com Reviewed-by: David Guckian Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/denverton_ns/cpu.c 1 file changed, 0 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved David Guckian: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 2a63171..fc1024a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -38,7 +38,6 @@ static void dnv_configure_mca(void) { msr_t msr; - int num_banks; struct cpuid_result cpuid_regs;
/* Check feature flag in CPUID.(EAX=1):EDX[7]==1 MCE @@ -48,7 +47,6 @@ return;
msr = rdmsr(IA32_MCG_CAP); - num_banks = msr.lo & IA32_MCG_CAP_COUNT_MASK; if (msr.lo & IA32_MCG_CAP_CTL_P_MASK) { /* Enable all error logging */ msr.lo = msr.hi = 0xffffffff;
-
David Guckian (Code Review) -
HAOUAS Elyes (Code Review)
-
Patrick Georgi (Code Review)