Change in coreboot[master]: soc/intel/adl: Enable GPIO PM after booting to OS - coreboot-gerrit

12 Nov 2021


      Attention is currently required from: Maulik V Vaghela, Subrata Banik, Mark Hsieh, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59264 )
Change subject: soc/intel/adl: Enable GPIO PM after booting to OS
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Patch Set 1:
(1 comment)
Patchset:
PS1: 
Hey Mark, with this patch included on a system running older cr50 FW (0.3.22), can you still read the cr50 FW or do you still get the error?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie5be925caace7a58052476d0995fb9ee0efc2fd2
Gerrit-Change-Number: 59264
Gerrit-PatchSet: 1
Gerrit-Owner: Maulik V Vaghela maulik.v.vaghela@intel.com
Gerrit-Reviewer: Mark Hsieh mark_hsieh@wistron.corp-partner.google.com
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