Change in coreboot[master]: mb/google/brya/var/felwinter: Correct typeC EC mux port

[EricR Lai (Code Review)]

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58930 )

Change subject: mb/google/brya/var/felwinter: Correct typeC EC mux port
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mb/google/brya/var/felwinter: Correct typeC EC mux port

Type C port2 is used EC mux port0.

BUG=b:204230406
TEST=No error message in depthahrge.
update_port_state: port C2: get_usb_pd_mux_info failed

Signed-off-by: Eric Lai 
Change-Id: I85218c81018b248c41a2cdaf9360a86e2a7d4d7a
---
M src/mainboard/google/brya/variants/felwinter/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/58930/1

diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
index 0fa2e61..6921b70 100644
--- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb
+++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
@@ -126,7 +126,7 @@
    		#TBD, felwinter remove typeC port0
    		chip ec/google/chromeec
    			use conn1 as mux_conn[1]
-				use conn2 as mux_conn[2]
+				use conn2 as mux_conn[0]
    			device pnp 0c09.0 on end
    		end
    	end