Change in coreboot[master]: mb/google/guybrush/bootblock: add comment on selecting eSPI interface

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58876 )

Change subject: mb/google/guybrush/bootblock: add comment on selecting eSPI interface
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mb/google/guybrush/bootblock: add comment on selecting eSPI interface

Setting the PM_ESPI_CS_USE_DATA2 bit in PM_SPI_PAD_PU_PD results in the
eSPI transactions being sent via the SPI2 pins instead of the SPI1 pins.

Signed-off-by: Felix Held 
Change-Id: Iad8e3a48496a52c14c936ab77c75dc1b403f47bb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58876
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
---
M src/mainboard/google/guybrush/bootblock.c
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Raul Rangel: Looks good to me, approved

diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c
index 83ac43a..187b2ef 100644
--- a/src/mainboard/google/guybrush/bootblock.c
+++ b/src/mainboard/google/guybrush/bootblock.c
@@ -63,6 +63,7 @@

/* Early eSPI interface configuration */

+	/* Use SPI2 pins for eSPI */
    dword = pm_read32(PM_SPI_PAD_PU_PD);
    dword |= PM_ESPI_CS_USE_DATA2;
    pm_write32(PM_SPI_PAD_PU_PD, dword);