Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50623 )
Change subject: soc/amd/cezanne/include/iomap: add HPET base address ......................................................................
soc/amd/cezanne/include/iomap: add HPET base address
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I72559147a3f86f0cb843b74af9b148d23229ff14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50623 Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/cezanne/include/soc/iomap.h 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h index 73640f5..0d59c2c 100644 --- a/src/soc/amd/cezanne/include/soc/iomap.h +++ b/src/soc/amd/cezanne/include/soc/iomap.h @@ -5,6 +5,12 @@
/* MMIO Ranges */ #define SPI_BASE_ADDRESS 0xfec10000 + +#if CONFIG(HPET_ADDRESS_OVERRIDE) +#error HPET address override is not allowed and must be fixed at 0xfed00000 +#endif +#define HPET_BASE_ADDRESS 0xfed00000 + /* FCH AL2AHB Registers */ #define ALINK_AHB_ADDRESS 0xfedc0000