[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86005?usp=email )

Change subject: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin
......................................................................

mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin

On PTL RVP, ISH shares UART with FPS, we can enable either ISH UART or
FPS UART, or disable both UART by changing the DIP switch settings. When
DIP switch is not set for ISH, ISH RX signal is disconnected, causing
ISH low power mode failure. Therefore, NC ISH RX pin mux to minimize the
impact on ISH PM. As a result, ISH console won't accept input since this
pin is not connected.

TEST=PTL RVP H1 DB, DIP SW1317 3-6, 4-5 ON to enable FPS UART, ISH main
firmware boots up and runs successfully.
SW1317 all switches OFF to disable both FPS and ISH UART, ISH main
firmware boots up and runs successfully.

Change-Id: Ic84f8ead6a1fd056e649edbb1471bcb913a0a09a
Signed-off-by: Li Feng 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86005
Reviewed-by: Jayvik Desai 
Reviewed-by: Kapil Porwal 
Reviewed-by: Pranava Y N 
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/fatcat/variants/fatcat/fw_config.c
M src/mainboard/google/fatcat/variants/fatcat/gpio.c
2 files changed, 2 insertions(+), 4 deletions(-)

Approvals:
  Kapil Porwal: Looks good to me, approved
  Jayvik Desai: Looks good to me, approved
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved
  Pranava Y N: Looks good to me, approved

diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
index 3e6a192..ad14c66 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c
@@ -418,8 +418,6 @@
 };

static const struct pad_config ish_disable_pads[] = {
-	/* GPP_D05:     NC */
-	PAD_NC(GPP_D05, NONE),
    /* GPP_D06:     NC */
    PAD_NC(GPP_D06, NONE),
    /* GPP_E05:     NC */
@@ -429,8 +427,6 @@
 };

static const struct pad_config ish_enable_pads[] = {
-	/* GPP_D05:     ISH_UART0_RXD */
-	PAD_CFG_NF(GPP_D05, NONE, DEEP, NF2),
    /* GPP_D06:     ISH_UART0_TXD */
    PAD_CFG_NF(GPP_D06, NONE, DEEP, NF2),
    /* GPP_E05:     ISH_GP_7_SNSR_HDR */
diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
index cf1e040..75c674c 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
@@ -149,6 +149,8 @@
    PAD_CFG_GPO(GPP_D03, 1, PLTRST),
    /* GPP_D04:     IMGCLKOUT_0 */
    PAD_CFG_NF(GPP_D04, NONE, DEEP, NF1),
+	/* GPP_D05:     disable ISH_UART0_RXD */
+	PAD_NC(GPP_D05, NONE),
    /* GPP_D07:     NC */
    PAD_NC(GPP_D07, NONE),
    /* GPP_D08:     NC */