Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34726
to look at the new patch set (#2).
Change subject: soc/intel/{cnl,icl}: Use new power-failure-state API ......................................................................
soc/intel/{cnl,icl}: Use new power-failure-state API
The PMC is not represented as a PCI device on these platforms, so we pass PCI_DEV_INVALID, and ignore the device argument to pmc_soc_set_afterg3_en().
pmc_soc_restore_power_failure() is only called from SMM, so add `pmc.c` to the `smm` class. Once all platforms moved to the new API, it can be implemented in a central place, avoiding the weak- function trap.
TEST=Confirmed register states for MAINBOARD_POWER_STATE_OFF and MAINBOARD_POWER_STATE_ON on Cannonlake PCH-H, at the end of this patch series.
Change-Id: Ib13eac00002232d4377f683ad92b04a0907529f3 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/mainboard/google/sarien/chromeos.c M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/cannonlake/pmc.c M src/soc/intel/icelake/Makefile.inc M src/soc/intel/icelake/pmc.c 5 files changed, 21 insertions(+), 111 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/34726/2