Change in coreboot[master]: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
Attention is currently required from: Martin Roth, Andrey Petrov, Patrick Rudolph. Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50275 )
Change subject: intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI ......................................................................
intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
This change renames config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI in preparation to allow V1 and V2 versions of MP services PPI.
TEST=Verified that timeless build for brya, volteer, icelake_rvp, elkhartlake_crb and waddledee shows no change in generated coreboot.rom
Change-Id: I04acf1bc3a3739b31d6e9d01b6aa97542378754f Signed-off-by: Furquan Shaikh furquan@google.com --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/drivers/intel/fsp2_0/ppi/Kconfig M src/drivers/intel/fsp2_0/ppi/Makefile.inc M src/soc/intel/alderlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 10 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/50275/1
diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index d054cfe..67a76a1 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -334,7 +334,7 @@ * function will always getting called from coreboot context * (ESP stack pointer will always refer to coreboot). * - * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * But with MP_SERVICES_PPI implementation in coreboot this * assumption might not be true, where FSP context (stack pointer refers * to FSP) will request to get cpu_index(). * diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index b622465..c2cc4ef 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -306,7 +306,7 @@ * function will always getting called from coreboot context * (ESP stack pointer will always refer to coreboot). * - * But with FSP_USES_MP_SERVICES_PPI implementation in coreboot this + * But with MP_SERVICES_PPI implementation in coreboot this * assumption might not be true, where FSP context (stack pointer refers * to FSP) will request to get cpu_index(). * diff --git a/src/drivers/intel/fsp2_0/ppi/Kconfig b/src/drivers/intel/fsp2_0/ppi/Kconfig index 4f77a32..bb99dc3 100644 --- a/src/drivers/intel/fsp2_0/ppi/Kconfig +++ b/src/drivers/intel/fsp2_0/ppi/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
-config FSP_USES_MP_SERVICES_PPI +config MP_SERVICES_PPI bool default n depends on SOC_INTEL_COMMON_BLOCK_CPU_MPINIT diff --git a/src/drivers/intel/fsp2_0/ppi/Makefile.inc b/src/drivers/intel/fsp2_0/ppi/Makefile.inc index 8d8d990..59a550f 100644 --- a/src/drivers/intel/fsp2_0/ppi/Makefile.inc +++ b/src/drivers/intel/fsp2_0/ppi/Makefile.inc @@ -1,3 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only
-ramstage-$(CONFIG_FSP_USES_MP_SERVICES_PPI) += mp_service_ppi.c +ramstage-$(CONFIG_MP_SERVICES_PPI) += mp_service_ppi.c diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 0474750..91a3f65 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -34,12 +34,12 @@ select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC select INTEL_TME + select MP_SERVICES_PPI select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_2 - select FSP_USES_MP_SERVICES_PPI select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index f4249c6..b1c5aa2 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -75,7 +75,7 @@
config USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI bool "Perform MP Initialization by FSP using coreboot MP PPI service" - default y if FSP_USES_MP_SERVICES_PPI + default y if MP_SERVICES_PPI default n help This option allows FSP to make use of MP services PPI published by diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 3492640..8c0b4e6 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -26,12 +26,12 @@ select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC + select MP_SERVICES_PPI select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 - select FSP_USES_MP_SERVICES_PPI select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index dc62b10..7915bdb 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -26,12 +26,12 @@ select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC + select MP_SERVICES_PPI select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 - select FSP_USES_MP_SERVICES_PPI select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 633a19c..81503c3 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -27,12 +27,12 @@ select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC + select MP_SERVICES_PPI select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_2 - select FSP_USES_MP_SERVICES_PPI select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 16efca8..6ffde92 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -30,12 +30,12 @@ select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC + select MP_SERVICES_PPI select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_2 - select FSP_USES_MP_SERVICES_PPI select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_LOW_POWER_MODE_PROGRAM
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Furquan Shaikh (Code Review)