Attention is currently required from: Nico Huber, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49363 )
Change subject: nb/intel/sandybridge: Correct description of QCLK
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Patch Set 1:
(1 comment)
Patchset:
PS1:
The old text seems to make more sense, why should it be one half?
I checked the various algorithms that add/subtract QCLKs to timings and they only make sense if one QCLK is half a clock cycle. For example, rcven finds the preamble edge by doing full clock-cycle backward steps in `find_roundtrip_latency`, which are 2 QCLK in size.
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