Change in coreboot[master]: soc/intel/braswell: Fix SPI write after FLOCKDN is set

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/20891

Change subject: soc/intel/braswell: Fix SPI write after FLOCKDN is set
......................................................................

soc/intel/braswell: Fix SPI write after FLOCKDN is set

The the spi controller initialization in finalize_chipset was failing
because FSP was setting FLOCKDN before finalize_chipset was called .
Hence moving finalize_chipset to get called from BS_POST_DEVICE so that it is
called before FSP notify function-Ready To Boot state

TEST: run flashrom with -VVV and observe supported opcodes and SPI
flash chip are reported correctly, and write/erase operations succeeed.

Original-Change-Id: I3c0297f3f2258cf77cf00db367f11ff4d1d9dc77
Original-Signed-off-by: Hannah Williams 
Original-Reviewed-by: Aaron Durbin

Change-Id: I690fb4bf9e78bb58811c704179ba8b8f25ce95cc
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/braswell/southcluster.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/20891/1

diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 1c450e9..0e2d5e2 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -508,5 +508,4 @@
    outb(APM_CNT_FINALIZE, APM_CNT);
 }

-BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL);
-BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, NULL);
+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, finalize_chipset, NULL);