[S] Change in coreboot[main]: soc/amd: Add DBG2 ACPI table

[Bao Zheng (Code Review)]

Attention is currently required from: Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Raul Rangel, Simon Glass, Tim Wawrzynczak, Zheng Bao.

Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79174?usp=email )

Change subject: soc/amd: Add DBG2 ACPI table
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Patch Set 9:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/79174/comment/b12fd4a0_8fee3e0e :
PS7, Line 7: mendocino
> needs updating

Done

File src/soc/amd/common/block/uart/uart.c:

https://review.coreboot.org/c/coreboot/+/79174/comment/eaccde4b_9b1e324c :
PS7, Line 108: #if CONFIG(AMD_SOC_CONSOLE_UART)
             : 	/* Add DBG2 table */
> Probably don't need this anymore.

Done

File src/soc/amd/mendocino/agesa_acpi.c:

https://review.coreboot.org/c/coreboot/+/79174/comment/d054a7e0_66b7c83b :
PS6, Line 31: #if CONFIG(AMD_SOC_CONSOLE_UART)
> #if shouldn't be needed here and a regular if can likely be used instead

Done

https://review.coreboot.org/c/coreboot/+/79174/comment/61980136_cb22543c :
PS6, Line 33: current = acpi_16550_write_dbg2_uart(rsdp, current,
            : 		uart_platform_base(get_uart_for_console()), NULL);
> also, the DBG2 table has nothing to do with AGESA

Done