[S] Change in coreboot[main]: soc/amd: Rename PSP_APOB_DRAM_SIZE -> PSP_APOB_NV_DRAM_SIZE
Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86627?usp=email )
Change subject: soc/amd: Rename PSP_APOB_DRAM_SIZE -> PSP_APOB_NV_DRAM_SIZE ......................................................................
soc/amd: Rename PSP_APOB_DRAM_SIZE -> PSP_APOB_NV_DRAM_SIZE
Since there is both an APOB as well as a APOB_NV region it is confusing when the naming is mixed.
Signed-off-by: Maximilian Brune maximilian.brune@9elements.com Change-Id: I8f497685dfe51a7a5283f6d7421e7273cb8b4b1d --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/apob/apob_cache.c M src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld M src/soc/amd/genoa_poc/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig M src/soc/amd/picasso/Kconfig 8 files changed, 10 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/86627/1
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 7b97ce7..ba0d80c 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -132,7 +132,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x10000
diff --git a/src/soc/amd/common/block/apob/apob_cache.c b/src/soc/amd/common/block/apob/apob_cache.c index 713826a..470ce1c 100644 --- a/src/soc/amd/common/block/apob/apob_cache.c +++ b/src/soc/amd/common/block/apob/apob_cache.c @@ -41,10 +41,10 @@ #error Incorrect APOB configuration setting(s) #endif
-_Static_assert(CONFIG_PSP_APOB_DRAM_SIZE == DEFAULT_MRC_CACHE_SIZE, +_Static_assert(CONFIG_PSP_APOB_NV_DRAM_SIZE == DEFAULT_MRC_CACHE_SIZE, "APOB DRAM reserved space != to MRC CACHE size - check your config");
-_Static_assert(CONFIG_PSP_APOB_DRAM_SIZE == RECOVERY_MRC_CACHE_SIZE, +_Static_assert(CONFIG_PSP_APOB_NV_DRAM_SIZE == RECOVERY_MRC_CACHE_SIZE, "APOB DRAM reserved space != to RECOVERY MRC CACHE size - check your config");
#define APOB_SIGNATURE 0x424F5041 /* 'APOB' */ diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 3c596f4..63eba25 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -62,7 +62,7 @@ * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 * | Transfer Info Structure | * +--------------------------------+ PSP_SHAREDMEM_BASE - * | APOB (PSP_APOB_DRAM_SIZE) | + * | APOB (PSP_APOB_NV_DRAM_SIZE) | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS * | Early BSP stack | * | (EARLYRAM_BSP_STACK_SIZE) | @@ -83,7 +83,7 @@ EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE)
EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE) - REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_DRAM_SIZE, 1) + REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_NV_DRAM_SIZE, 1)
#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) diff --git a/src/soc/amd/genoa_poc/Kconfig b/src/soc/amd/genoa_poc/Kconfig index 25dd914..5aec453 100644 --- a/src/soc/amd/genoa_poc/Kconfig +++ b/src/soc/amd/genoa_poc/Kconfig @@ -87,7 +87,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x20000
diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 1bd5b2f..38002a0 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -121,7 +121,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x40000
diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index ee6c968..4d1a4e1 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -152,7 +152,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x1E000
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index b15c12d..e7f450c 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -134,7 +134,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x40000
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index f450e29..52b16d9 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -122,7 +122,7 @@ Location in DRAM where the PSP will copy the AGESA PSP Output Block.
-config PSP_APOB_DRAM_SIZE +config PSP_APOB_NV_DRAM_SIZE hex default 0x10000
-
Maximilian Brune (Code Review)