Change in coreboot[master]: soc/mediatek/mt8186: Increase size of CBFS_MCACHE

[Rex-BC Chen (Code Review)]

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60529 )

Change subject: soc/mediatek/mt8186: Increase size of CBFS_MCACHE
......................................................................

soc/mediatek/mt8186: Increase size of CBFS_MCACHE

The current CBFS mcache size (roughly 7KiB) is insufficient for mt8186,
so increase it by 1KiB.

Error logs:
CBFS ERROR: mcache overflow, should increase CBFS_MCACHE size!
CBFS: mcache @0x0010e004 built for 63 files, used 0xde4 of 0xdfc bytes

BUG=b:202871018
TEST=no cbfs error logs.

Signed-off-by: Rex-BC Chen 
Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f
---
M src/soc/mediatek/mt8186/include/soc/memlayout.ld
1 file changed, 7 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/60529/1

diff --git a/src/soc/mediatek/mt8186/include/soc/memlayout.ld b/src/soc/mediatek/mt8186/include/soc/memlayout.ld
index 36078d3..e57e323 100644
--- a/src/soc/mediatek/mt8186/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8186/include/soc/memlayout.ld
@@ -23,13 +23,13 @@
 {
    SRAM_START(0x00100000)
    VBOOT2_WORK(0x00100000, 12K)
-	STACK(0x00103000, 8K)
-	TTB(0x00105000, 28K)
-	DMA_COHERENT(0x0010C000, 4K)
-	TPM_TCPA_LOG(0x0010D000, 2K)
-	FMAP_CACHE(0x0010D800, 2K)
-	WATCHDOG_TOMBSTONE(0x0010E000, 4)
-	CBFS_MCACHE(0x0010E004, 7K - 4)
+	TTB(0x00103000, 28K)
+	DMA_COHERENT(0x0010A000, 4K)
+	STACK(0x0010B000, 7K)
+	TPM_TCPA_LOG(0x0010CC00, 2K)
+	FMAP_CACHE(0x0010D400, 2K)
+	WATCHDOG_TOMBSTONE(0x0010DC00, 4)
+	CBFS_MCACHE(0x0010DC04, 8K - 4)
    TIMESTAMP(0x0010FC00, 1K)
    /* MT8186 has 64KB SRAM. */
    SRAM_END(0x00110000)