Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/21283 )
Change subject: soc/intel/cannonlake: add files ......................................................................
Patch Set 1:
(3 comments)
I think it would be a good idea to make two CLs out of this: 1. adding spi.c and gspi.c to verstage 2. adding gpio files to romstage and ramstage
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG@7 PS1, Line 7: add files Add spi* files to verstage
https://review.coreboot.org/#/c/21283/1//COMMIT_MSG@9 PS1, Line 9: some files spi.c and gspi.c
https://review.coreboot.org/#/c/21283/1/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/21283/1/src/soc/intel/cannonlake/Kconfig@19 PS1, Line 19: select GENERIC_GPIO_LIB Can you please push this in a separate CL of its own.
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Furquan Shaikh (Code Review)