[XS] Change in coreboot[main]: mb/google/nissa/var/anraggar: Update touchscreen enable pin to GPP_C0

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81265?usp=email )

(

4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/google/nissa/var/anraggar: Update touchscreen enable pin to GPP_C0
......................................................................

mb/google/nissa/var/anraggar: Update touchscreen enable pin to GPP_C0

Assign GPP_C0 and enable only the touchscreen. Before modification,
GPP_C0 supplies power to the touchscreen and sensor at the same time.
Now the hardware circuit has been modified, GPP_C0 supplies power to the
touchscreen alone. After the software is synchronously modified, when
the device enters suspend(S0ix), GPP_C0 will not enable VDD, which can
reduce the standby power consumption of the touchscreen when it is
suspended(S0ix), which is about 2.1mW.

BUG=b:304920262
TEST= touchscreen function workable

Change-Id: Ia06209aa8303be4fc0669c5d6e5d7a06e8e9ab99
Signed-off-by: Qinghong Zeng 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81265
Reviewed-by: Eric Lai 
Tested-by: build bot (Jenkins) 
Reviewed-by: Weimin Wu 
---
M src/mainboard/google/brya/variants/anraggar/overridetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Eric Lai: Looks good to me, approved
  build bot (Jenkins): Verified
  Weimin Wu: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/brya/variants/anraggar/overridetree.cb b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
index e0e46f6..c7942c1 100644
--- a/src/mainboard/google/brya/variants/anraggar/overridetree.cb
+++ b/src/mainboard/google/brya/variants/anraggar/overridetree.cb
@@ -239,7 +239,7 @@
    			register "generic.detect" = "1"
    			register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
    			register "generic.reset_delay_ms" = "200"
-				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C6)"
+				register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
    			register "generic.enable_delay_ms" = "12"
    			register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
    			register "generic.stop_off_delay_ms" = "200"