[S] Change in coreboot[master]: soc/amd/mendocino: Update XHCI GPE to use constant

[Robert Zieba (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.

Robert Zieba has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69916 )

Change subject: soc/amd/mendocino: Update XHCI GPE to use constant
......................................................................

soc/amd/mendocino: Update XHCI GPE to use constant

The GPE number used for XHCI has now been defined
in AMD's common code. This commit changes over existing
code to use this new definition.

BUG=b:186792595
TEST=Ran on skyrim device and verified XHCI GPE setting.

Signed-off-by: Robert Zieba 
Change-Id: I3bfc2256ea2ca851afe88f2cdb419f39eee76fdd
---
M src/soc/amd/common/block/xhci/elog.c
M src/soc/amd/mendocino/xhci.c
2 files changed, 23 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/69916/1

diff --git a/src/soc/amd/common/block/xhci/elog.c b/src/soc/amd/common/block/xhci/elog.c
index 8e53cdb9..7378ac3 100644
--- a/src/soc/amd/common/block/xhci/elog.c
+++ b/src/soc/amd/common/block/xhci/elog.c
@@ -10,7 +10,7 @@
 #include <device/xhci.h>
 #include <elog.h>

-#define PORTSC_OFFSET 0x400;
+#define PORTSC_OFFSET 0x400
 #define PORTSC_STRIDE 0x10
 #define XHCI_PROG_ID 0x30

@@ -53,7 +53,7 @@
    uintptr_t op_base = context->bar + cap_regs->caplength;
    uintptr_t addr = op_base + PORTSC_OFFSET + PORTSC_STRIDE * (protocol->port_offset - 1);

-	switch (protocol->major_rev == 2) {
+	switch (protocol->major_rev) {
    case 2:
    	xhci_port_wake_check(addr, controller, count, ELOG_WAKE_SOURCE_PME_XHCI_USB_2);
    	break;
diff --git a/src/soc/amd/mendocino/xhci.c b/src/soc/amd/mendocino/xhci.c
index fdd0118..720cc76 100644
--- a/src/soc/amd/mendocino/xhci.c
+++ b/src/soc/amd/mendocino/xhci.c
@@ -4,6 +4,7 @@

#include <amdblocks/gpio.h>
 #include <amdblocks/smi.h>
+#include <amdblocks/xhci.h>
 #include <bootstate.h>
 #include <device/device.h>
 #include <device/pci_ids.h>
@@ -14,19 +15,19 @@
 static const struct sci_source xhci_sci_sources[] = {
    {
    	.scimap = SMITYPE_XHC0_PME,
-		.gpe = GEVENT_31,
+		.gpe = XHCI_GEVENT,
    	.direction = SMI_SCI_LVL_HIGH,
    	.level = SMI_SCI_EDG
    },
    {
    	.scimap = SMITYPE_XHC1_PME,
-		.gpe = GEVENT_31,
+		.gpe = XHCI_GEVENT,
    	.direction = SMI_SCI_LVL_HIGH,
    	.level = SMI_SCI_EDG
    },
    {
    	.scimap = SMITYPE_XHC2_PME,
-		.gpe = GEVENT_31,
+		.gpe = XHCI_GEVENT,
    	.direction = SMI_SCI_LVL_HIGH,
    	.level = SMI_SCI_EDG
    }