Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
amd/agesa/hudson boards: Get rid of power button device
Port commit d7b88dcb (mb/google/x86-boards: Get rid of power button device in coreboot) to AMD AGESA Hudson boards.
No idea, if this is correct for the two laptops. The Lenovo G505s also incorrectly defines two power buttons.
[ 0.911423] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 [ 0.911434] ACPI: Power Button [PWRB] [ 0.911493] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 [ 0.912326] ACPI: Power Button [PWRF]
If the generic power button device is needed, the POWER_BUTTON flag should be set in FADT.
Change-Id: I88950e15faf1b90ca6e688864bac40bf9779c32e Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/amd/parmer/dsdt.asl M src/mainboard/amd/thatcher/dsdt.asl M src/mainboard/asus/f2a85-m/dsdt.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl M src/mainboard/lenovo/g505s/acpi/mainboard.asl M src/mainboard/msi/ms7721/dsdt.asl 6 files changed, 0 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/40754/1
diff --git a/src/mainboard/amd/parmer/dsdt.asl b/src/mainboard/amd/parmer/dsdt.asl index 20e550f..95b4a72 100644 --- a/src/mainboard/amd/parmer/dsdt.asl +++ b/src/mainboard/amd/parmer/dsdt.asl @@ -39,13 +39,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl index 20e550f..95b4a72 100644 --- a/src/mainboard/amd/thatcher/dsdt.asl +++ b/src/mainboard/amd/thatcher/dsdt.asl @@ -39,13 +39,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl index e436409..426b330 100644 --- a/src/mainboard/asus/f2a85-m/dsdt.asl +++ b/src/mainboard/asus/f2a85-m/dsdt.asl @@ -39,13 +39,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl index fc8fb72..6d1370a 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl @@ -80,12 +80,6 @@ } }
- Device(PWRB) { - Name(_HID, EisaId("PNP0C0C")) - Name(_UID, 0xAA) - Name(_STA, 0x0B) - } - Device (MB) { Name(_HID, EisaId("PNP0C01")) // System Board
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index fc8fb72..6d1370a 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -80,12 +80,6 @@ } }
- Device(PWRB) { - Name(_HID, EisaId("PNP0C0C")) - Name(_UID, 0xAA) - Name(_STA, 0x0B) - } - Device (MB) { Name(_HID, EisaId("PNP0C01")) // System Board
diff --git a/src/mainboard/msi/ms7721/dsdt.asl b/src/mainboard/msi/ms7721/dsdt.asl index 5fb15ea..375ce96 100644 --- a/src/mainboard/msi/ms7721/dsdt.asl +++ b/src/mainboard/msi/ms7721/dsdt.asl @@ -36,13 +36,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 1:
Idwer, it’d be great if you could test, that the power button still works on the Asus board.
Mike, I am not sure about the laptop change. Could you please test the commit?
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 1:
Please change it so that it could be built successfully, then I can test.
Hello Mike Banon, build bot (Jenkins), Idwer Vollering, Alexander Couzens, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40754
to look at the new patch set (#2).
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
amd/agesa/hudson boards: Get rid of power button device
Port commit d7b88dcb (mb/google/x86-boards: Get rid of power button device in coreboot) to AMD AGESA Hudson boards.
No idea, if this is correct for the two laptops. The Lenovo G505s also incorrectly defines two power buttons.
[ 0.911423] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 [ 0.911434] ACPI: Power Button [PWRB] [ 0.911493] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 [ 0.912326] ACPI: Power Button [PWRF]
If the generic power button device is needed, the POWER_BUTTON flag should be set in FADT.
The GPE ACPI code seems to originate from commit 806def8c (I missed the svn add on r3787. These are the additional files., Add AMD dbm690t ACPI support.), and was copied over.
Change-Id: I88950e15faf1b90ca6e688864bac40bf9779c32e Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/amd/parmer/acpi/gpe.asl M src/mainboard/amd/parmer/dsdt.asl M src/mainboard/amd/thatcher/acpi/gpe.asl M src/mainboard/amd/thatcher/dsdt.asl M src/mainboard/asus/f2a85-m/acpi/gpe.asl M src/mainboard/asus/f2a85-m/dsdt.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl M src/mainboard/lenovo/g505s/acpi/gpe.asl M src/mainboard/lenovo/g505s/acpi/mainboard.asl M src/mainboard/msi/ms7721/acpi/gpe.asl M src/mainboard/msi/ms7721/dsdt.asl 12 files changed, 0 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/40754/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4:
Mike, it builds successfully now. ;-) Tests welcome.
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4:
This is in my TODO list after we fix the current allocation problems at master
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4:
I just noticed that fam16h ASUS AM1I-A, Biostar AM1ML (and maybe some other boards?) also have a similar code. Should it be removed from them as well? Please reply while I'm testing the fam15h boards
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4: Code-Review+1
f15tn: both Lenovo G505S and ASUS A88XM-E boot fine with this patch. I did a similar change for f16kb ASUS AM1I-A (see below) - and it also boots fine. +1 only because I suspect this patch is incomplete (not for all the boards with such a code), but I'm not confident enough to amend this change.
diff --git a/src/mainboard/asus/am1i-a/dsdt.asl b/src/mainboard/asus/am1i-a/dsdt.asl index 4000d61538..8544c97da2 100644 --- a/src/mainboard/asus/am1i-a/dsdt.asl +++ b/src/mainboard/asus/am1i-a/dsdt.asl @@ -36,13 +36,6 @@ DefinitionBlock ( /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4:
Patch Set 4: Code-Review+1
f15tn: both Lenovo G505S and ASUS A88XM-E boot fine with this patch. I did a similar change for f16kb ASUS AM1I-A (see below) - and it also boots fine. +1 only because I suspect this patch is incomplete (not for all the boards with such a code), but I'm not confident enough to amend this change.
diff --git a/src/mainboard/asus/am1i-a/dsdt.asl b/src/mainboard/asus/am1i-a/dsdt.asl index 4000d61538..8544c97da2 100644 --- a/src/mainboard/asus/am1i-a/dsdt.asl +++ b/src/mainboard/asus/am1i-a/dsdt.asl @@ -36,13 +36,6 @@ DefinitionBlock ( /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
Device(PWRB) {
Name(_HID, EISAID("PNP0C0C"))
Name(_UID, 0xAA)
Name(_PRW, Package () {3, 0x04})
Name(_STA, 0x0B)
}
Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family16kb/acpi/northbridge.asl>
Thanks. My plan is to submit separate change-sets for that.
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 4: Code-Review+2
If you'll do a similar change for f16kb, please let me know
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
amd/agesa/hudson boards: Get rid of power button device
Port commit d7b88dcb (mb/google/x86-boards: Get rid of power button device in coreboot) to AMD AGESA Hudson boards.
No idea, if this is correct for the two laptops. The Lenovo G505s also incorrectly defines two power buttons.
[ 0.911423] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 [ 0.911434] ACPI: Power Button [PWRB] [ 0.911493] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input2 [ 0.912326] ACPI: Power Button [PWRF]
If the generic power button device is needed, the POWER_BUTTON flag should be set in FADT.
The GPE ACPI code seems to originate from commit 806def8c (I missed the svn add on r3787. These are the additional files., Add AMD dbm690t ACPI support.), and was copied over.
Change-Id: I88950e15faf1b90ca6e688864bac40bf9779c32e Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/40754 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Mike Banon mikebdp2@gmail.com --- M src/mainboard/amd/parmer/acpi/gpe.asl M src/mainboard/amd/parmer/dsdt.asl M src/mainboard/amd/thatcher/acpi/gpe.asl M src/mainboard/amd/thatcher/dsdt.asl M src/mainboard/asus/f2a85-m/acpi/gpe.asl M src/mainboard/asus/f2a85-m/dsdt.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl M src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl M src/mainboard/lenovo/g505s/acpi/gpe.asl M src/mainboard/lenovo/g505s/acpi/mainboard.asl M src/mainboard/msi/ms7721/acpi/gpe.asl M src/mainboard/msi/ms7721/dsdt.asl 12 files changed, 0 insertions(+), 60 deletions(-)
Approvals: build bot (Jenkins): Verified Mike Banon: Looks good to me, approved
diff --git a/src/mainboard/amd/parmer/acpi/gpe.asl b/src/mainboard/amd/parmer/acpi/gpe.asl index e401f66..726e111 100644 --- a/src/mainboard/amd/parmer/acpi/gpe.asl +++ b/src/mainboard/amd/parmer/acpi/gpe.asl @@ -5,7 +5,6 @@ /* General event 3 */ Method(_L03) { /* DBGO("\_GPE\_L00\n") */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Legacy PM event */ @@ -29,7 +28,6 @@ Notify(_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* ExtEvent0 SCI event */ @@ -50,13 +48,11 @@ Notify(_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Azalia SCI event */ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/amd/parmer/dsdt.asl b/src/mainboard/amd/parmer/dsdt.asl index 3a1cbe9..16aef97 100644 --- a/src/mainboard/amd/parmer/dsdt.asl +++ b/src/mainboard/amd/parmer/dsdt.asl @@ -38,13 +38,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/amd/thatcher/acpi/gpe.asl b/src/mainboard/amd/thatcher/acpi/gpe.asl index e401f66..726e111 100644 --- a/src/mainboard/amd/thatcher/acpi/gpe.asl +++ b/src/mainboard/amd/thatcher/acpi/gpe.asl @@ -5,7 +5,6 @@ /* General event 3 */ Method(_L03) { /* DBGO("\_GPE\_L00\n") */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Legacy PM event */ @@ -29,7 +28,6 @@ Notify(_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* ExtEvent0 SCI event */ @@ -50,13 +48,11 @@ Notify(_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Azalia SCI event */ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/amd/thatcher/dsdt.asl b/src/mainboard/amd/thatcher/dsdt.asl index 3a1cbe9..16aef97 100644 --- a/src/mainboard/amd/thatcher/dsdt.asl +++ b/src/mainboard/amd/thatcher/dsdt.asl @@ -38,13 +38,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/asus/f2a85-m/acpi/gpe.asl b/src/mainboard/asus/f2a85-m/acpi/gpe.asl index 69a5ccf..30d10ce 100644 --- a/src/mainboard/asus/f2a85-m/acpi/gpe.asl +++ b/src/mainboard/asus/f2a85-m/acpi/gpe.asl @@ -5,7 +5,6 @@ /* General event 3 */ Method(_L03) { /* DBGO("\_GPE\_L00\n") */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Legacy PM event */ @@ -29,7 +28,6 @@ Notify(_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* ExtEvent0 SCI event */ @@ -47,13 +45,11 @@ Method(_L18) { /* DBGO("\_GPE\_L18\n") */ Notify(_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Azalia SCI event */ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/asus/f2a85-m/dsdt.asl b/src/mainboard/asus/f2a85-m/dsdt.asl index 6eb1c4f..6234a00 100644 --- a/src/mainboard/asus/f2a85-m/dsdt.asl +++ b/src/mainboard/asus/f2a85-m/dsdt.asl @@ -38,13 +38,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl> diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl index 36d84b3..1e15d7a 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/gpe.asl @@ -23,7 +23,6 @@ Notify(_SB.PCI0.UOH4, 0x02) Notify(_SB.PCI0.XHC0, 0x02) Notify(_SB.PCI0.UEH1, 0x02) - Notify(_SB.PWRB, 0x02) }
/* ExtEvent0 SCI event */ @@ -58,6 +57,5 @@ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl index 059794e..dd3318e 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl +++ b/src/mainboard/hp/pavilion_m6_1035dx/acpi/mainboard.asl @@ -79,12 +79,6 @@ } }
- Device(PWRB) { - Name(_HID, EisaId("PNP0C0C")) - Name(_UID, 0xAA) - Name(_STA, 0x0B) - } - Device (MB) { Name(_HID, EisaId("PNP0C01")) // System Board
diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl index dda8ce5..9ec85a0 100644 --- a/src/mainboard/lenovo/g505s/acpi/gpe.asl +++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl @@ -23,7 +23,6 @@ Notify(_SB.PCI0.UOH4, 0x02) Notify(_SB.PCI0.XHC0, 0x02) Notify(_SB.PCI0.UEH1, 0x02) - Notify(_SB.PWRB, 0x02) }
/* ExtEvent0 SCI event */ @@ -58,6 +57,5 @@ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index 059794e..dd3318e 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -79,12 +79,6 @@ } }
- Device(PWRB) { - Name(_HID, EisaId("PNP0C0C")) - Name(_UID, 0xAA) - Name(_STA, 0x0B) - } - Device (MB) { Name(_HID, EisaId("PNP0C01")) // System Board
diff --git a/src/mainboard/msi/ms7721/acpi/gpe.asl b/src/mainboard/msi/ms7721/acpi/gpe.asl index 69a5ccf..30d10ce 100644 --- a/src/mainboard/msi/ms7721/acpi/gpe.asl +++ b/src/mainboard/msi/ms7721/acpi/gpe.asl @@ -5,7 +5,6 @@ /* General event 3 */ Method(_L03) { /* DBGO("\_GPE\_L00\n") */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Legacy PM event */ @@ -29,7 +28,6 @@ Notify(_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UOH6, 0x02) /* NOTIFY_DEVICE_WAKE */ Notify(_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* ExtEvent0 SCI event */ @@ -47,13 +45,11 @@ Method(_L18) { /* DBGO("\_GPE\_L18\n") */ Notify(_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ }
/* Azalia SCI event */ Method(_L1B) { /* DBGO("\_GPE\_L1B\n") */ Notify(_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */ - Notify(_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */ } } /* End Scope GPE */ diff --git a/src/mainboard/msi/ms7721/dsdt.asl b/src/mainboard/msi/ms7721/dsdt.asl index 3d21e77..7c8f6aa 100644 --- a/src/mainboard/msi/ms7721/dsdt.asl +++ b/src/mainboard/msi/ms7721/dsdt.asl @@ -35,13 +35,6 @@ /* Describe IRQ Routing mapping for this platform (within the _SB scope) */ #include "acpi/routing.asl"
- Device(PWRB) { - Name(_HID, EISAID("PNP0C0C")) - Name(_UID, 0xAA) - Name(_PRW, Package () {3, 0x04}) - Name(_STA, 0x0B) - } - Device(PCI0) { /* Describe the AMD Northbridge */ #include <northbridge/amd/agesa/family15tn/acpi/northbridge.asl>
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40754 )
Change subject: amd/agesa/hudson boards: Get rid of power button device ......................................................................
Patch Set 5:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4992 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4991 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4990 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4989
Please note: This test is under development and might not be accurate at all!