Change in coreboot[master]: nb/i945: Fix sdram_rcomp_buffer_strength_and_slew for i945GC

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27590 )

Change subject: nb/i945: Fix sdram_rcomp_buffer_strength_and_slew for i945GC
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Patch Set 19:

(3 comments)

https://review.coreboot.org/c/coreboot/+/27590/19/src/northbridge/intel/i945... 
File src/northbridge/intel/i945/raminit_i945gc.c:

https://review.coreboot.org/c/coreboot/+/27590/19/src/northbridge/intel/i945... 
PS19, Line 844: 	int idx0, dual_channel;
If you do the renaming to idx0 in a separate commit, the diff would be smaller?

https://review.coreboot.org/c/coreboot/+/27590/19/src/northbridge/intel/i945... 
PS19, Line 854:   
Fix this before to just use one space?

https://review.coreboot.org/c/coreboot/+/27590/19/src/northbridge/intel/i945... 
PS19, Line 892: 		sdram_write_slew_rates(G7SRPUT, slew_group_lookup(dual_channel, idx1 * 8 + 6));
Why does dual channel work with the mobile chipset? Any idea, why no separate idx1 is needed there?