Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41033 )
Change subject: soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/1
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 90e669d..ecc9489 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -137,6 +137,7 @@
#define PAD_FUNC(value) PAD_CFG0_MODE_##value #define PAD_RESET(value) PAD_CFG0_LOGICAL_RESET_##value +#define PAD_RX_POL(value) PAD_CFG0_RX_POL_##value #define PAD_TRIG(value) PAD_CFG0_TRIG_##value #define PAD_PULL(value) PAD_CFG1_PULL_##value
@@ -160,14 +161,14 @@ #define PAD_IRQ_CFG(route, trig, inv) \ (PAD_CFG0_ROUTE_##route | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv))
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT) #define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \ (PAD_CFG0_ROUTE_##route1 | \ PAD_CFG0_ROUTE_##route2 | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv)) #endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
#define _PAD_CFG_STRUCT(__pad, __config0, __config1) \ @@ -292,7 +293,7 @@ #define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \ _PAD_CFG_STRUCT(pad, \ PAD_FUNC(GPIO) | PAD_RESET(rst) | \ - PAD_TRIG(trig) | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE), \ + PAD_TRIG(trig) | PAD_RX_POL(NONE) | PAD_BUF(TX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own))
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \ @@ -305,7 +306,7 @@ #define PAD_CFG_GPIO_DRIVER_HI_Z(pad, pull, rst, iosstate, iosterm) \ _PAD_CFG_STRUCT(pad, \ PAD_FUNC(GPIO) | PAD_RESET(rst) | \ - PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_RX_DISABLE), \ + PAD_RX_POL(NONE) | PAD_BUF(TX_RX_DISABLE), \ PAD_PULL(pull) | PAD_CFG_OWN_GPIO(DRIVER) | \ PAD_IOSSTATE(iosstate) | PAD_IOSTERM(iosterm))
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41033
to look at the new patch set (#2).
Change subject: soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 6 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/2
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41033
to look at the new patch set (#4).
Change subject: soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/4
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41033
to look at the new patch set (#5).
Change subject: soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard does not change.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/5
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41033
to look at the new patch set (#7).
Change subject: soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard does not change.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/7
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41033
to look at the new patch set (#9).
Change subject: soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard does not change.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/41033/9
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41033 )
Change subject: soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
Patch Set 11: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41033 )
Change subject: soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL() ......................................................................
soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()
Converts PAD_CFG0_RX_POL_* macros to PAD_RX_POL() to make the code cleaner and reduce the length of the macro.
Tested with BUILD_TIMELESS=1, Kontron COMe-mAL10 on T10-TNI carrierboard does not change.
Change-Id: I09a048fd38ccb994f53c8829c549bc2b368fa546 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41033 Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/include/intelblocks/gpio_defs.h 1 file changed, 4 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index f6e139d..e257f07 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -124,6 +124,7 @@
#define PAD_FUNC(value) PAD_CFG0_MODE_##value #define PAD_RESET(value) PAD_CFG0_LOGICAL_RESET_##value +#define PAD_RX_POL(value) PAD_CFG0_RX_POL_##value #define PAD_TRIG(value) PAD_CFG0_TRIG_##value #define PAD_PULL(value) PAD_CFG1_PULL_##value
@@ -147,14 +148,14 @@ #define PAD_IRQ_CFG(route, trig, inv) \ (PAD_CFG0_ROUTE_##route | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv))
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT) #define PAD_IRQ_CFG_DUAL_ROUTE(route1, route2, trig, inv) \ (PAD_CFG0_ROUTE_##route1 | \ PAD_CFG0_ROUTE_##route2 | \ PAD_TRIG(trig) | \ - PAD_CFG0_RX_POL_##inv) + PAD_RX_POL(inv)) #endif /* CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT */
#define _PAD_CFG_STRUCT(__pad, __config0, __config1) \ @@ -272,7 +273,7 @@ */ #define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own) \ _PAD_CFG_STRUCT(pad, PAD_FUNC(GPIO) | PAD_RESET(rst) | \ - PAD_TRIG(trig) | PAD_CFG0_RX_POL_NONE | PAD_BUF(TX_DISABLE), \ + PAD_TRIG(trig) | PAD_RX_POL(NONE) | PAD_BUF(TX_DISABLE), \ PAD_PULL(pull) | PAD_IOSSTATE(TxDRxE) | PAD_CFG_OWN_GPIO(own))
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst) \