Change in coreboot[master]: soc/intel/tigerlake: Enable support for common IRQ block

[Nick Vaccaro (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49409 )

Change subject: soc/intel/tigerlake: Enable support for common IRQ block
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Patch Set 8:

(1 comment)

File src/soc/intel/tigerlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/49409/comment/8b352f90_9dbdf21f 
PS8, Line 252: PCH devices only
> No, we have to pass only the PCH devices (slot >= 0x10) to the FSP to program IRQs for. […]

The logic on line 245 & 246 made me think PCH devices were slot < 0x10, since it incremented the pch_counter each time it encontered devices with slot < 0x10.  Should that have been a >= on line 245?