Change in coreboot[master]: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms

[Nico Huber (Code Review)]

Attention is currently required from: Martin Roth, Stefan Reinauer, Christian Walter.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49461 )

Change subject: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms
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Patch Set 2:

(2 comments)

File payloads/external/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/49461/comment/5d7e6837_f9457ebc 
PS2, Line 117: domains
> Does this scan all PCI domains or all PCI buses? Does it scan bus 255 or everything up to 255?

I tried to explain this below. It controls the maximum number of
trees hanging on host bridges. So we could limit this by the number
of host bridges on a board.

Without any change, SeaBIOS would already scan bus 255 _if_ it is
found in the hierarchy below the first host bridge. With this
change, it still only looks at "domain" 0, but it would continue
scanning buses even if they are not part of a single hierarchy.

That 255 is used here is confusing because it's also the maximum
bus number. 255 extra PCI roots would mean we'd have exactly one
bus per root _and_ no space for any PCI bridge in the whole system
(every bus would hang directly below a host bridge). Doesn't make
much sense, maybe not worth to try to understand it ;)

https://review.coreboot.org/c/coreboot/+/49461/comment/1c109d67_de75e0a6 
PS2, Line 118: 255
> On my Xeon-SP there are devices on bus 0xff.
> Please note that
> for SeaBIOS this is not the maximum bus number but the maximum number
> of individual trees of buses.

Let me provide an example, this is from the Thinkpad X201 (Ironlake)
I'm typing on (lsusb -t):

-+-[0000:ff]-+-00.0
   |           +-00.1
   |           +-02.0
   |           +-02.1
   |           +-02.2
   |           -02.3
   -[0000:00]-+-00.0
               +-02.0
               +-16.0
               +-19.0
               +-1a.0
               +-1b.0
               +-1c.0-[01]--
               +-1c.1-[02]--
               +-1c.3-[03]--
               +-1c.4-[04]----00.0
               +-1d.0
               +-1e.0-[05]--
               +-1f.0
               +-1f.2
               +-1f.3
               -1f.6

What we can see here is that bus 255 is not part of the hierarchy
below bus 0. Hence, this is an extra root (in SeaBIOS' words).

Without any change, SeaBIOS would start scanning bus 0, at some
point encounter 1e.0 and see the highest secondary bus number 5.
So SeaBIOS would continue to scan buses up to 5. Then stop,
because it doesn't consider extra roots by default.

With a setting of `extra-pci-roots = 1`, it would continue
scanning until it finds another device, in this case `ff:00.0`.
Why not do so by default? it has to scan 250 * 32 additional
device addresses before it finds `ff:00.0`.

In case of my Thinkpad, this doesn't matter because there are
no boot devices below the second root (only internal stuff that
Intel doesn't want us to know about anyway). Maybe for Xeon-SP
it's similar (no boot devices below the last root) and the opti-
mum is the number of host bridges - 1 - 1 (another -1 because
it already scans one host bridge by default).