[XS] Change in coreboot[main]: soc/intel/common/pmc: Change GPE DW duplicate message to warning

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86174?usp=email )

Change subject: soc/intel/common/pmc: Change GPE DW duplicate message to warning
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soc/intel/common/pmc: Change GPE DW duplicate message to warning

The message printed when duplicate GPE DW register values are
detected was previously logged at the INFO level. This commit
changes the log level to WARNING, as duplicate DW values indicate
a potential misconfiguration and warrant closer attention. While
the system falls back to the default GPE route (as per MISCCFG
register), this situation should be investigated to ensure correct
platform configuration.

This change ensures that developers are more clearly notified of
potential GPE routing issues.

TEST=Built and booted on a platform using PMC GPE routing. Verified
that the message is printed at the WARNING level when duplicate DW
values are present.

Change-Id: I7804ddfa6e067014e034364bd8efbf6efe746cd7
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86174
Tested-by: build bot (Jenkins) 
Reviewed-by: Jérémy Compostella 
Reviewed-by: Matt DeVillier 
---
M src/soc/intel/common/block/pmc/pmclib.c
1 file changed, 2 insertions(+), 1 deletion(-)

Approvals:
  Jérémy Compostella: Looks good to me, approved
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 18a527a..8c48e88 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -657,7 +657,8 @@
     * are different, and if they aren't use the reset values.
     */
    if (dw0 == dw1 || dw1 == dw2 || dw0 == dw2) {
-		printk(BIOS_INFO, "PMC: Using default GPE route.\n");
+		printk(BIOS_WARNING, "PMC: Duplicate GPE DW register values detected; "
+		       "using default GPE route from MISCCFG register\n");
    	gpio_cfg = read32p(pmc_bar + GPIO_GPE_CFG);

dw0 = (gpio_cfg >> GPE0_DW_SHIFT(0)) & GPE0_DWX_MASK;