Alexander Couzens has uploaded this change for review. ( https://review.coreboot.org/21237
Change subject: Kconfig: move remaining Mainboard options into src/mainboard/Kconfig.mainboard ......................................................................
Kconfig: move remaining Mainboard options into src/mainboard/Kconfig.mainboard
Change-Id: I909d090ea449dbf0ef0328b7c2741214bc8a07d4 Signed-off-by: Alexander Couzens lynxis@fe80.eu --- M src/Kconfig M src/mainboard/Kconfig.mainboard 2 files changed, 40 insertions(+), 40 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/21237/1
diff --git a/src/Kconfig b/src/Kconfig index 637f575..4dd1ded 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -273,46 +273,6 @@
source "src/mainboard/Kconfig"
-config DEVICETREE - string - default "devicetree.cb" - help - This symbol allows mainboards to select a different file under their - mainboard directory for the devicetree.cb file. This allows the board - variants that need different devicetrees to be in the same directory. - - Examples: "devicetree.variant.cb" - "variant/devicetree.cb" - -config CBFS_SIZE - hex "Size of CBFS filesystem in ROM" - # Default value set at the end of the file - help - This is the part of the ROM actually managed by CBFS, located at the - end of the ROM (passed through cbfstool -o) on x86 and at at the start - of the ROM (passed through cbfstool -s) everywhere else. It defaults - to span the whole ROM on all but Intel systems that use an Intel Firmware - Descriptor. It can be overridden to make coreboot live alongside other - components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE - binaries. - -config FMDFILE - string "fmap description file in fmd format" - default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS - default "" - help - The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE, - but in some cases more complex setups are required. - When an fmd is specified, it overrides the default format. - -config MAINBOARD_HAS_TPM2 - bool - default n - help - There is a TPM device installed on the mainboard, and it is - compliant with version 2 TCG TPM specification. Could be connected - over LPC, SPI or I2C. - endmenu
# load site-local kconfig to allow user specific defaults and overrides diff --git a/src/mainboard/Kconfig.mainboard b/src/mainboard/Kconfig.mainboard index babbb95..8983b8a 100644 --- a/src/mainboard/Kconfig.mainboard +++ b/src/mainboard/Kconfig.mainboard @@ -155,3 +155,43 @@ config ENABLE_POWER_BUTTON def_bool y if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_ENABLE def_bool n if !POWER_BUTTON_IS_OPTIONAL && POWER_BUTTON_FORCE_DISABLE + +config DEVICETREE + string + default "devicetree.cb" + help + This symbol allows mainboards to select a different file under their + mainboard directory for the devicetree.cb file. This allows the board + variants that need different devicetrees to be in the same directory. + + Examples: "devicetree.variant.cb" + "variant/devicetree.cb" + +config CBFS_SIZE + hex "Size of CBFS filesystem in ROM" + # Default value set at the end of the file + help + This is the part of the ROM actually managed by CBFS, located at the + end of the ROM (passed through cbfstool -o) on x86 and at at the start + of the ROM (passed through cbfstool -s) everywhere else. It defaults + to span the whole ROM on all but Intel systems that use an Intel Firmware + Descriptor. It can be overridden to make coreboot live alongside other + components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE + binaries. + +config FMDFILE + string "fmap description file in fmd format" + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS + default "" + help + The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE, + but in some cases more complex setups are required. + When an fmd is specified, it overrides the default format. + +config MAINBOARD_HAS_TPM2 + bool + default n + help + There is a TPM device installed on the mainboard, and it is + compliant with version 2 TCG TPM specification. Could be connected + over LPC, SPI or I2C.