[XS] Change in coreboot[master]: common/block/cse: Add config option to store CSE version in CMOS

[Krishna P Bhat D (Code Review)]

Krishna P Bhat D has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75601?usp=email )

Change subject: common/block/cse: Add config option to store CSE version in CMOS
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common/block/cse: Add config option to store CSE version in CMOS

This patch adds an option to store CSE version in CMOS memory when split
CSE firmware sync option is selected or store FPT partition version is
selected.

Change-Id: I95ecd7d576d83e639c590f9180e17554d5b6502e
Signed-off-by: Krishna Prasad Bhat 
---
M src/soc/intel/common/block/cse/Kconfig
1 file changed, 8 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/75601/1

diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index ce11653..6b41d32 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -48,7 +48,7 @@
 config SOC_INTEL_PARTITION_FW_CMOS_OFFSET
    int
    default 72
-	depends on SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
+	depends on SOC_INTEL_STORE_CSE_VERSION_IN_CMOS
    help
      This configuration option stores the starting offset of firmware partition versions in
      CMOS memory. The offset should be byte aligned and must leave enough memory to store
@@ -276,6 +276,13 @@
      This config will enable CSE RW firmware update to be deferred to ramstage.
      Switch from CSE RO to RW will still be performed in romstage.

+config SOC_INTEL_STORE_CSE_VERSION_IN_CMOS
+	bool
+	default y if SOC_INTEL_CSE_LITE_SPLIT_FW_SYNC || SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
+	depends on SOC_INTEL_CSE_LITE_SKU
+	help
+	  This configuration option stores the CSE firmware version in CMOS memory.
+
 config SOC_INTEL_CSE_HAVE_SPEC_SUPPORT
    bool
    depends on SOC_INTEL_COMMON_BLOCK_CSE