Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85828?usp=email )
Change subject: mb/google/rauru: Determine PCIe init by storage_id ......................................................................
mb/google/rauru: Determine PCIe init by storage_id
Determine the PCIe initialization by storage_id(). The variant that does not equip NvME storage can skip the PCIe initialization.
BUG=b:368244423,b:348118849 TEST=Check cbmem and see "Skip setting PCIe ops" on Navi.
Change-Id: Iaee7c346f4eaf004437aed3554d9275c9b821ad8 Signed-off-by: Yidi Lin yidilin@chromium.org --- M src/mainboard/google/rauru/mainboard.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/85828/1
diff --git a/src/mainboard/google/rauru/mainboard.c b/src/mainboard/google/rauru/mainboard.c index a49caf6..c7a2941 100644 --- a/src/mainboard/google/rauru/mainboard.c +++ b/src/mainboard/google/rauru/mainboard.c @@ -15,6 +15,7 @@ #include <soc/usb.h>
#include "gpio.h" +#include "storage_id.h"
#define AFE_SE_SECURE_CON1 (AUDIO_BASE + 0x5634)
@@ -48,7 +49,7 @@
bool mainboard_needs_pcie_init(void) { - return true; + return storage_id() == 3; }
static void mainboard_init(struct device *dev)