You-Cheng Syu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33167
Change subject: google/kukui: Pass SPI0_CSB to depthcharge ......................................................................
google/kukui: Pass SPI0_CSB to depthcharge
We need to pass GPIO pin SPI0_CSB to depthcharge so that it can manually control this pin during SPI transactions.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: I5e352fb93b8d330701a4e351b6884d7a7976c296 --- M src/mainboard/google/kukui/chromeos.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/33167/1
diff --git a/src/mainboard/google/kukui/chromeos.c b/src/mainboard/google/kukui/chromeos.c index 2cef10e..3685272 100644 --- a/src/mainboard/google/kukui/chromeos.c +++ b/src/mainboard/google/kukui/chromeos.c @@ -39,6 +39,7 @@ {EC_IRQ.id, ACTIVE_LOW, -1, "EC interrupt"}, {CR50_IRQ.id, ACTIVE_HIGH, -1, "TPM interrupt"}, {GPIO_EN_SPK_AMP.id, ACTIVE_HIGH, -1, "speaker enable"}, + {spi_bus[0].cs_gpio->id, ACTIVE_LOW, -1, "SPI0 CS"}, }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); }
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33167
to look at the new patch set (#2).
Change subject: google/kukui: Pass SPI0_CSB to depthcharge ......................................................................
google/kukui: Pass SPI0_CSB to depthcharge
We need to pass GPIO pin SPI0_CSB to depthcharge so that it can manually control this pin during SPI transactions.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: I5e352fb93b8d330701a4e351b6884d7a7976c296 Signed-off-by: You-Cheng Syu youcheng@google.com --- M src/mainboard/google/kukui/chromeos.c 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/33167/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33167
to look at the new patch set (#3).
Change subject: google/kukui: Pass SPI0_CSB to depthcharge ......................................................................
google/kukui: Pass SPI0_CSB to depthcharge
We need to pass GPIO pin SPI0_CSB to depthcharge so that it can manually control this pin during SPI transactions.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: I5e352fb93b8d330701a4e351b6884d7a7976c296 Signed-off-by: You-Cheng Syu youcheng@google.com --- M src/mainboard/google/kukui/chromeos.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/33167/3
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33167 )
Change subject: google/kukui: Pass SPI0_CSB to depthcharge ......................................................................
Patch Set 3:
@youcheng Please abandon this CL since we only need https://review.coreboot.org/c/coreboot/+/33165.
You-Cheng Syu has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33167 )
Change subject: google/kukui: Pass SPI0_CSB to depthcharge ......................................................................
Abandoned
-
You-Cheng Syu (Code Review) -
Yu-Ping Wu (Code Review)