Change in ...coreboot[master]: device/pnp: Add header files for PNP ops

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31698 )

Change subject: device/pnp: Add header files for PNP ops
......................................................................

device/pnp: Add header files for PNP ops

Change-Id: Ifda495420cfb121ad32920bb9f1cbdeef41f6d3a
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/31698
Reviewed-by: Aaron Durbin 
Tested-by: build bot (Jenkins) 
---
M src/arch/x86/include/arch/io.h
M src/ec/google/wilco/bootblock.c
M src/ec/hp/kbc1126/early_init.c
A src/include/device/pnp_ops.h
A src/include/device/pnp_type.h
M src/mainboard/asrock/b75pro3-m/romstage.c
M src/mainboard/asrock/g41c-gs/romstage.c
M src/mainboard/asrock/h81m-hds/romstage.c
M src/mainboard/asus/am1i-a/romstage.c
M src/mainboard/asus/f2a85-m/romstage.c
M src/mainboard/asus/h61m-cs/romstage.c
M src/mainboard/asus/kfsn4-dre/bootblock.c
M src/mainboard/asus/kfsn4-dre/romstage.c
M src/mainboard/asus/maximus_iv_gene-z/romstage.c
M src/mainboard/asus/p5gc-mx/romstage.c
M src/mainboard/asus/p5qpl-am/romstage.c
M src/mainboard/asus/p8h61-m_pro/romstage.c
M src/mainboard/biostar/am1ml/romstage.c
M src/mainboard/getac/p470/romstage.c
M src/mainboard/hp/dl165_g6_fam10/bootblock.c
M src/mainboard/ibase/mb899/romstage.c
M src/mainboard/intel/dg41wv/romstage.c
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/kontron/ktqm77/romstage.c
M src/mainboard/lenovo/t400/dock.c
M src/mainboard/lenovo/t60/romstage.c
M src/mainboard/lenovo/x60/romstage.c
M src/mainboard/lenovo/z61t/romstage.c
M src/mainboard/msi/ms7721/romstage.c
M src/mainboard/msi/ms9652_fam10/romstage.c
M src/mainboard/roda/rk886ex/romstage.c
M src/mainboard/roda/rk9/romstage.c
M src/mainboard/roda/rv11/variants/rw11/romstage.c
M src/mainboard/supermicro/h8qme_fam10/romstage.c
M src/mainboard/supermicro/x10slm-f/romstage.c
M src/superio/fintek/common/early_serial.c
M src/superio/fintek/common/fintek.h
M src/superio/fintek/f81216h/early_serial.c
M src/superio/fintek/f81216h/f81216h.h
M src/superio/intel/i8900/early_serial.c
M src/superio/intel/i8900/i8900.h
M src/superio/ite/common/early_serial.c
M src/superio/ite/common/ite.h
M src/superio/ite/it8671f/early_serial.c
M src/superio/ite/it8671f/it8671f.h
M src/superio/ite/it8718f/early_serial.c
M src/superio/ite/it8718f/it8718f.h
M src/superio/ite/it8772f/early_init.c
M src/superio/ite/it8772f/it8772f.h
M src/superio/nsc/common/early_serial.c
M src/superio/nsc/common/nsc.h
M src/superio/nsc/pc87417/early_init.c
M src/superio/nsc/pc87417/pc87417.h
M src/superio/nsc/pc97317/early_serial.c
M src/superio/nsc/pc97317/pc97317.h
M src/superio/nuvoton/common/early_serial.c
M src/superio/nuvoton/common/nuvoton.h
M src/superio/nuvoton/nct5104d/early_init.c
M src/superio/nuvoton/nct5104d/nct5104d.h
M src/superio/nuvoton/wpcm450/early_init.c
M src/superio/serverengines/pilot/early_init.c
M src/superio/serverengines/pilot/early_serial.c
M src/superio/serverengines/pilot/pilot.h
M src/superio/smsc/dme1737/dme1737.h
M src/superio/smsc/dme1737/early_serial.c
M src/superio/smsc/kbc1100/early_init.c
M src/superio/smsc/kbc1100/kbc1100.h
M src/superio/smsc/lpc47b272/early_serial.c
M src/superio/smsc/lpc47b272/lpc47b272.h
M src/superio/smsc/lpc47b397/early_serial.c
M src/superio/smsc/lpc47b397/lpc47b397.h
M src/superio/smsc/lpc47m10x/early_serial.c
M src/superio/smsc/lpc47m10x/lpc47m10x.h
M src/superio/smsc/lpc47m15x/early_serial.c
M src/superio/smsc/lpc47m15x/lpc47m15x.h
M src/superio/smsc/lpc47n217/early_serial.c
M src/superio/smsc/lpc47n217/lpc47n217.h
M src/superio/smsc/lpc47n227/early_serial.c
M src/superio/smsc/lpc47n227/lpc47n227.h
M src/superio/smsc/sch4037/sch4037_early_init.c
M src/superio/smsc/sio1036/sio1036.h
M src/superio/smsc/sio1036/sio1036_early_init.c
M src/superio/smsc/smscsuperio/early_serial.c
M src/superio/smsc/smscsuperio/smscsuperio.h
M src/superio/winbond/common/early_init.c
M src/superio/winbond/common/winbond.h
M src/superio/winbond/w83627dhg/early_serial.c
M src/superio/winbond/w83627dhg/w83627dhg.h
M src/superio/winbond/w83627thg/w83627thg.h
M src/superio/winbond/wpcd376i/early_serial.c
M src/superio/winbond/wpcd376i/wpcd376i.h
91 files changed, 138 insertions(+), 32 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved

diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 98cb15a..f0c0c80 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -202,12 +202,10 @@
 }
 #endif

-typedef u32 pnp_devfn_t;
+#include <device/pnp_type.h>

#ifdef __SIMPLE_DEVICE__

-#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
-
 /* Generic functions for pnp devices */
 static __always_inline void pnp_write_config(
    pnp_devfn_t dev, uint8_t reg, uint8_t value)
diff --git a/src/ec/google/wilco/bootblock.c b/src/ec/google/wilco/bootblock.c
index 183edf3..7457806 100644
--- a/src/ec/google/wilco/bootblock.c
+++ b/src/ec/google/wilco/bootblock.c
@@ -15,6 +15,7 @@

#include <arch/io.h>
 #include <endian.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>

#include "bootblock.h"
diff --git a/src/ec/hp/kbc1126/early_init.c b/src/ec/hp/kbc1126/early_init.c
index 2a74a93..844794e 100644
--- a/src/ec/hp/kbc1126/early_init.c
+++ b/src/ec/hp/kbc1126/early_init.c
@@ -14,6 +14,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include "ec.h"

diff --git a/src/include/device/pnp_ops.h b/src/include/device/pnp_ops.h
new file mode 100644
index 0000000..370ede8
--- /dev/null
+++ b/src/include/device/pnp_ops.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DEVICE_PNP_OPS_H__
+#define __DEVICE_PNP_OPS_H__
+
+/* FIXME: We only want the PNP ops. */
+#include <arch/io.h>
+
+#endif
diff --git a/src/include/device/pnp_type.h b/src/include/device/pnp_type.h
new file mode 100644
index 0000000..db26f2f
--- /dev/null
+++ b/src/include/device/pnp_type.h
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DEVICE_PNP_TYPE_H__
+#define __DEVICE_PNP_TYPE_H__
+
+#include <stdint.h>
+
+typedef u32 pnp_devfn_t;
+
+#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
+
+#endif /* __DEVICE_PNP_TYPE_H__ */
diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c
index 205c08c..5199124 100644
--- a/src/mainboard/asrock/b75pro3-m/romstage.c
+++ b/src/mainboard/asrock/b75pro3-m/romstage.c
@@ -15,6 +15,7 @@
  */

#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <superio/nuvoton/nct6776/nct6776.h>
 #include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 12f5cd4..8474d18 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -15,7 +15,7 @@
  * GNU General Public License for more details.
  */

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/intel/romstage.h>
diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c
index c6bef9f..78eb657 100644
--- a/src/mainboard/asrock/h81m-hds/romstage.c
+++ b/src/mainboard/asrock/h81m-hds/romstage.c
@@ -18,6 +18,7 @@
 #include <stdint.h>
 #include <cpu/intel/romstage.h>
 #include <cpu/intel/haswell/haswell.h>
+#include <device/pnp_ops.h>
 #include <northbridge/intel/haswell/haswell.h>
 #include <northbridge/intel/haswell/pei_data.h>
 #include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c
index c42b86c..a692167 100644
--- a/src/mainboard/asus/am1i-a/romstage.c
+++ b/src/mainboard/asus/am1i-a/romstage.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index db50765..bed5a73 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <device/pci_ops.h>

#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c
index a0083fb..94f58c1 100644
--- a/src/mainboard/asus/h61m-cs/romstage.c
+++ b/src/mainboard/asus/h61m-cs/romstage.c
@@ -17,6 +17,7 @@

#include <northbridge/intel/sandybridge/sandybridge.h>
 #include <device/pci_ops.h>
+#include <device/pnp_ops.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asus/kfsn4-dre/bootblock.c b/src/mainboard/asus/kfsn4-dre/bootblock.c
index ec8b2da..796ca1a 100644
--- a/src/mainboard/asus/kfsn4-dre/bootblock.c
+++ b/src/mainboard/asus/kfsn4-dre/bootblock.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <pc80/mc146818rtc.h>

#include <superio/winbond/common/winbond.h>
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 66ebbdc..ae778f2 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -22,6 +22,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
index d32b6f9..f0506fb 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c
+++ b/src/mainboard/asus/maximus_iv_gene-z/romstage.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/dram/ddr3.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c
index 6493809..2f45113 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/romstage.c
@@ -20,6 +20,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c
index c172ef8..c59f38c 100644
--- a/src/mainboard/asus/p5qpl-am/romstage.c
+++ b/src/mainboard/asus/p5qpl-am/romstage.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/intel/romstage.h>
diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c
index 63daa2e..7384828 100644
--- a/src/mainboard/asus/p8h61-m_pro/romstage.c
+++ b/src/mainboard/asus/p8h61-m_pro/romstage.c
@@ -14,6 +14,7 @@
  */

#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c
index 9ac32a3..e537c31 100644
--- a/src/mainboard/biostar/am1ml/romstage.c
+++ b/src/mainboard/biostar/am1ml/romstage.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <commonlib/loglevel.h>
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index dcfd27f..2f90572 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -17,6 +17,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/hp/dl165_g6_fam10/bootblock.c b/src/mainboard/hp/dl165_g6_fam10/bootblock.c
index 7a88566..16908cf 100644
--- a/src/mainboard/hp/dl165_g6_fam10/bootblock.c
+++ b/src/mainboard/hp/dl165_g6_fam10/bootblock.c
@@ -12,6 +12,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>

#define SCH4307_CONFIG_PORT     0x162e
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index fd0db72..dbb2aa7 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -18,6 +18,7 @@
 #include <stdint.h>
 #include <halt.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/intel/romstage.h>
diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c
index 64e8dd9..345e4b7 100644
--- a/src/mainboard/intel/dg41wv/romstage.c
+++ b/src/mainboard/intel/dg41wv/romstage.c
@@ -15,7 +15,7 @@
  * GNU General Public License for more details.
  */

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <console/console.h>
 #include <cpu/intel/romstage.h>
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 8a9fbf1..52432a0 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -24,6 +24,7 @@
 #include <cpu/x86/lapic.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>
 #include <pc80/mc146818rtc.h>
 #include <northbridge/intel/i945/i945.h>
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index 5333099..30800e8 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -17,7 +17,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/acpi.h>
-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/msr.h>
diff --git a/src/mainboard/lenovo/t400/dock.c b/src/mainboard/lenovo/t400/dock.c
index 6d1a80c..ccd6dcd 100644
--- a/src/mainboard/lenovo/t400/dock.c
+++ b/src/mainboard/lenovo/t400/dock.c
@@ -18,6 +18,7 @@
 #define __SIMPLE_DEVICE__
 #include <console/console.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pnp.h>
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index a8efa99..daf4179 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -20,6 +20,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 4a9757d..66ceffb 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -20,6 +20,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c
index 33700fe..df15641 100644
--- a/src/mainboard/lenovo/z61t/romstage.c
+++ b/src/mainboard/lenovo/z61t/romstage.c
@@ -20,6 +20,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <device/pnp_def.h>
diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c
index 1fa2fd8..29880f4 100644
--- a/src/mainboard/msi/ms7721/romstage.c
+++ b/src/mainboard/msi/ms7721/romstage.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 2316a05..0b073ed 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -20,6 +20,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 9492ca1..b36d78b 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -19,6 +19,7 @@
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <device/pci_def.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c
index a6adb17..eaddaf9 100644
--- a/src/mainboard/roda/rk9/romstage.c
+++ b/src/mainboard/roda/rk9/romstage.c
@@ -17,6 +17,7 @@
 /* __PRE_RAM__ means: use "unsigned" for device, not a struct. */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <southbridge/intel/common/gpio.h>
 #include <southbridge/intel/i82801ix/i82801ix.h>
diff --git a/src/mainboard/roda/rv11/variants/rw11/romstage.c b/src/mainboard/roda/rv11/variants/rw11/romstage.c
index e693f13..97d9d2b 100644
--- a/src/mainboard/roda/rv11/variants/rw11/romstage.c
+++ b/src/mainboard/roda/rv11/variants/rw11/romstage.c
@@ -16,6 +16,7 @@
 #include <stdint.h>
 #include <device/pci.h>
 #include <device/pci_ops.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <northbridge/intel/sandybridge/raminit.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index f61fa71..3e09da0 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -20,6 +20,7 @@
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c
index cf71b40..6170739 100644
--- a/src/mainboard/supermicro/x10slm-f/romstage.c
+++ b/src/mainboard/supermicro/x10slm-f/romstage.c
@@ -17,6 +17,7 @@

#include <cpu/intel/haswell/haswell.h>
 #include <cpu/intel/romstage.h>
+#include <device/pnp_ops.h>
 #include <northbridge/intel/haswell/haswell.h>
 #include <northbridge/intel/haswell/pei_data.h>
 #include <southbridge/intel/common/gpio.h>
diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c
index d653b1d..c625b53 100644
--- a/src/superio/fintek/common/early_serial.c
+++ b/src/superio/fintek/common/early_serial.c
@@ -34,6 +34,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "fintek.h"
diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h
index 7ad08ea..cbd175f 100644
--- a/src/superio/fintek/common/fintek.h
+++ b/src/superio/fintek/common/fintek.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_FINTEK_COMMON_PRE_RAM_H
 #define SUPERIO_FINTEK_COMMON_PRE_RAM_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void fintek_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/fintek/f81216h/early_serial.c b/src/superio/fintek/f81216h/early_serial.c
index 9e8e48b..1990c37 100644
--- a/src/superio/fintek/f81216h/early_serial.c
+++ b/src/superio/fintek/f81216h/early_serial.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "f81216h.h"
diff --git a/src/superio/fintek/f81216h/f81216h.h b/src/superio/fintek/f81216h/f81216h.h
index ec54165..1a6b640 100644
--- a/src/superio/fintek/f81216h/f81216h.h
+++ b/src/superio/fintek/f81216h/f81216h.h
@@ -17,6 +17,8 @@
 #ifndef SUPERIO_FINTEK_F81216H_H
 #define SUPERIO_FINTEK_F81216H_H

+#include <device/pnp_type.h>
+
 /* Logical Device Numbers (LDN). */
 #define F81216H_SP1    0x00	/* UART1 (+CIR mode) */
 #define F81216H_SP2    0x01	/* UART2 */
diff --git a/src/superio/intel/i8900/early_serial.c b/src/superio/intel/i8900/early_serial.c
index 2ec31fa..681b225 100644
--- a/src/superio/intel/i8900/early_serial.c
+++ b/src/superio/intel/i8900/early_serial.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include "i8900.h"

diff --git a/src/superio/intel/i8900/i8900.h b/src/superio/intel/i8900/i8900.h
index 3879a36..348d3c4 100644
--- a/src/superio/intel/i8900/i8900.h
+++ b/src/superio/intel/i8900/i8900.h
@@ -17,6 +17,8 @@
 #ifndef SUPERIO_INTEL_I8900_I8900_H
 #define SUPERIO_INTEL_I8900_I8900_H

+#include <device/pnp_type.h>
+
 /*
  * The SIW ("Serial I/O and Watchdog Timer") integrated into the i8900 is
  * very similar to a Super I/O, both in functionality and config mechanism.
diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c
index 24d5937..6402ae9 100644
--- a/src/superio/ite/common/early_serial.c
+++ b/src/superio/ite/common/early_serial.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "ite.h"
diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h
index 5b39672..151ba125 100644
--- a/src/superio/ite/common/ite.h
+++ b/src/superio/ite/common/ite.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_ITE_COMMON_PRE_RAM_H
 #define SUPERIO_ITE_COMMON_PRE_RAM_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

#define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */
diff --git a/src/superio/ite/it8671f/early_serial.c b/src/superio/ite/it8671f/early_serial.c
index 12c0ea5..b5b94df 100644
--- a/src/superio/ite/it8671f/early_serial.c
+++ b/src/superio/ite/it8671f/early_serial.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "it8671f.h"
diff --git a/src/superio/ite/it8671f/it8671f.h b/src/superio/ite/it8671f/it8671f.h
index 4b1ab42..5fe74bc 100644
--- a/src/superio/ite/it8671f/it8671f.h
+++ b/src/superio/ite/it8671f/it8671f.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_ITE_IT8671F_H
 #define SUPERIO_ITE_IT8671F_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

/* Datasheet: Not available online, got it from ITE per request. */
diff --git a/src/superio/ite/it8718f/early_serial.c b/src/superio/ite/it8718f/early_serial.c
index 915e10b..74233c4 100644
--- a/src/superio/ite/it8718f/early_serial.c
+++ b/src/superio/ite/it8718f/early_serial.c
@@ -14,7 +14,7 @@
  * GNU General Public License for more details.
  */

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <superio/ite/common/ite.h>
 #include "it8718f.h"

diff --git a/src/superio/ite/it8718f/it8718f.h b/src/superio/ite/it8718f/it8718f.h
index 8985997..ebf8c4c 100644
--- a/src/superio/ite/it8718f/it8718f.h
+++ b/src/superio/ite/it8718f/it8718f.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_ITE_IT8718F_H
 #define SUPERIO_ITE_IT8718F_H

-#include <arch/io.h>
+#include <device/pnp_type.h>

/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8718_2.asp */

diff --git a/src/superio/ite/it8772f/early_init.c b/src/superio/ite/it8772f/early_init.c
index b299d6d..95be01c 100644
--- a/src/superio/ite/it8772f/early_init.c
+++ b/src/superio/ite/it8772f/early_init.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>

#include "it8772f.h"

diff --git a/src/superio/ite/it8772f/it8772f.h b/src/superio/ite/it8772f/it8772f.h
index 91d107a..14d76ac 100644
--- a/src/superio/ite/it8772f/it8772f.h
+++ b/src/superio/ite/it8772f/it8772f.h
@@ -126,7 +126,7 @@
 /* GPIO Mode: 0: input mode, 1: output mode */
 #define GPIO_REG_OUTPUT(x)   (0xc8 + (x))

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

u8 it8772f_sio_read(pnp_devfn_t dev, u8 reg);
diff --git a/src/superio/nsc/common/early_serial.c b/src/superio/nsc/common/early_serial.c
index 2cd9f05..0ac146f 100644
--- a/src/superio/nsc/common/early_serial.c
+++ b/src/superio/nsc/common/early_serial.c
@@ -17,7 +17,7 @@
  * GNU General Public License for more details.
  */

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>
 #include <stdint.h>
 #include "nsc.h"
diff --git a/src/superio/nsc/common/nsc.h b/src/superio/nsc/common/nsc.h
index 76112dc..c2d732c 100644
--- a/src/superio/nsc/common/nsc.h
+++ b/src/superio/nsc/common/nsc.h
@@ -20,6 +20,7 @@

#include <device/pnp_def.h>
 #include <stdint.h>
+#include <device/pnp_type.h>

void nsc_enable_serial(pnp_devfn_t dev, u16 iobase);

diff --git a/src/superio/nsc/pc87417/early_init.c b/src/superio/nsc/pc87417/early_init.c
index c7ed11c..eab4126 100644
--- a/src/superio/nsc/pc87417/early_init.c
+++ b/src/superio/nsc/pc87417/early_init.c
@@ -17,6 +17,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "pc87417.h"
diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h
index b50a920..25401e4 100644
--- a/src/superio/nsc/pc87417/pc87417.h
+++ b/src/superio/nsc/pc87417/pc87417.h
@@ -110,7 +110,7 @@
 #define PC87417_XSCNF		0x15
 #define PC87417_XWBCNF		0x16

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void pc87417_disable_dev(pnp_devfn_t dev);
diff --git a/src/superio/nsc/pc97317/early_serial.c b/src/superio/nsc/pc97317/early_serial.c
index f13f98b..74489fa 100644
--- a/src/superio/nsc/pc97317/early_serial.c
+++ b/src/superio/nsc/pc97317/early_serial.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "pc97317.h"
diff --git a/src/superio/nsc/pc97317/pc97317.h b/src/superio/nsc/pc97317/pc97317.h
index 1d82817..76717fa 100644
--- a/src/superio/nsc/pc97317/pc97317.h
+++ b/src/superio/nsc/pc97317/pc97317.h
@@ -27,7 +27,7 @@
 #define PC97317_GPIO 0x07
 #define PC97317_PM   0x08 /* Power Management */

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void pc97317_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
index 380046f..9b5c2d3 100644
--- a/src/superio/nuvoton/common/early_serial.c
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -36,6 +36,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "nuvoton.h"
diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h
index 4cb2b6f..688364a 100644
--- a/src/superio/nuvoton/common/nuvoton.h
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -18,7 +18,7 @@
 #ifndef SUPERIO_NUVOTON_COMMON_PRE_RAM_H
 #define SUPERIO_NUVOTON_COMMON_PRE_RAM_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
diff --git a/src/superio/nuvoton/nct5104d/early_init.c b/src/superio/nuvoton/nct5104d/early_init.c
index 294f0ce..3559aba 100644
--- a/src/superio/nuvoton/nct5104d/early_init.c
+++ b/src/superio/nuvoton/nct5104d/early_init.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "nct5104d.h"
diff --git a/src/superio/nuvoton/nct5104d/nct5104d.h b/src/superio/nuvoton/nct5104d/nct5104d.h
index 055c5da..707e94a 100644
--- a/src/superio/nuvoton/nct5104d/nct5104d.h
+++ b/src/superio/nuvoton/nct5104d/nct5104d.h
@@ -18,6 +18,8 @@
 #ifndef SUPERIO_NUVOTON_NCT5104D_H
 #define SUPERIO_NUVOTON_NCT5104D_H

+#include <device/pnp_type.h>
+
 /* SIO global configuration */
 #define IRQ_TYPE_SEL_CR10   0x10     /* UARTA,UARTB */
 #define IRQ_TYPE_SEL_CR11   0x11     /* SMI,UARTC,UARTD,WDTO */
diff --git a/src/superio/nuvoton/wpcm450/early_init.c b/src/superio/nuvoton/wpcm450/early_init.c
index 2a3bf02..0ed5ac3 100644
--- a/src/superio/nuvoton/wpcm450/early_init.c
+++ b/src/superio/nuvoton/wpcm450/early_init.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>
 #include "wpcm450.h"

diff --git a/src/superio/serverengines/pilot/early_init.c b/src/superio/serverengines/pilot/early_init.c
index 82438e4..3509fb4 100644
--- a/src/superio/serverengines/pilot/early_init.c
+++ b/src/superio/serverengines/pilot/early_init.c
@@ -19,7 +19,7 @@

#define BLUBB_DEV PNP_DEV(port, 0x04)

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <console/console.h>
 #include <device/pnp.h>
 #include "pilot.h"
diff --git a/src/superio/serverengines/pilot/early_serial.c b/src/superio/serverengines/pilot/early_serial.c
index 21f7adf..555e4f5 100644
--- a/src/superio/serverengines/pilot/early_serial.c
+++ b/src/superio/serverengines/pilot/early_serial.c
@@ -18,6 +18,7 @@
 /* PILOT Super I/O is only based on LPC observation done on factory system. */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include "pilot.h"

diff --git a/src/superio/serverengines/pilot/pilot.h b/src/superio/serverengines/pilot/pilot.h
index ab9b9c8..a88f0e6 100644
--- a/src/superio/serverengines/pilot/pilot.h
+++ b/src/superio/serverengines/pilot/pilot.h
@@ -18,6 +18,8 @@
 #ifndef SUPERIO_SERVERENGINES_PILOT_PILOT_H
 #define SUPERIO_SERVERENGINES_PILOT_PILOT_H

+#include <device/pnp_type.h>
+
 /* PILOT Super I/O is only based on LPC observation done on factory system. */

#define PILOT_LD1 0x01 /* Logical device 1 */
diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h
index 3a5683b..f40cc35 100644
--- a/src/superio/smsc/dme1737/dme1737.h
+++ b/src/superio/smsc/dme1737/dme1737.h
@@ -26,7 +26,7 @@
 #define DME1737_KBC		7	/* Keyboard & Mouse */
 #define DME1737_RT		10	/* Runtime reg*/

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c
index 00813a0..58ad177 100644
--- a/src/superio/smsc/dme1737/early_serial.c
+++ b/src/superio/smsc/dme1737/early_serial.c
@@ -17,6 +17,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "dme1737.h"
diff --git a/src/superio/smsc/kbc1100/early_init.c b/src/superio/smsc/kbc1100/early_init.c
index 658de9b..fc36043 100644
--- a/src/superio/smsc/kbc1100/early_init.c
+++ b/src/superio/smsc/kbc1100/early_init.c
@@ -17,6 +17,7 @@
 /* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>

diff --git a/src/superio/smsc/kbc1100/kbc1100.h b/src/superio/smsc/kbc1100/kbc1100.h
index 41d70e5..8531643 100644
--- a/src/superio/smsc/kbc1100/kbc1100.h
+++ b/src/superio/smsc/kbc1100/kbc1100.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_SMSC_KBC1100_H
 #define SUPERIO_SMSC_KBC1100_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

#define KBC1100_PM1              1            /* PM1 */
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
index a6bf991..26fdfaf 100644
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ b/src/superio/smsc/lpc47b272/early_serial.c
@@ -17,6 +17,7 @@
 /* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "lpc47b272.h"
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
index d1f5f74..3fbd043 100644
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ b/src/superio/smsc/lpc47b272/lpc47b272.h
@@ -26,7 +26,7 @@

#define LPC47B272_MAX_CONFIG_REGISTER	0x5F

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47b397/early_serial.c b/src/superio/smsc/lpc47b397/early_serial.c
index a3d0381..a07cd99 100644
--- a/src/superio/smsc/lpc47b397/early_serial.c
+++ b/src/superio/smsc/lpc47b397/early_serial.c
@@ -17,6 +17,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "lpc47b397.h"
diff --git a/src/superio/smsc/lpc47b397/lpc47b397.h b/src/superio/smsc/lpc47b397/lpc47b397.h
index 43fc624..5f3a504 100644
--- a/src/superio/smsc/lpc47b397/lpc47b397.h
+++ b/src/superio/smsc/lpc47b397/lpc47b397.h
@@ -27,7 +27,7 @@
 #define LPC47B397_HWM		8	/* HW Monitor */
 #define LPC47B397_RT		10	/* Runtime reg*/

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c
index 6f165b4..96c0b5d 100644
--- a/src/superio/smsc/lpc47m10x/early_serial.c
+++ b/src/superio/smsc/lpc47m10x/early_serial.c
@@ -15,6 +15,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "lpc47m10x.h"
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h
index 3a3bf96..a83a6f2 100644
--- a/src/superio/smsc/lpc47m10x/lpc47m10x.h
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h
@@ -30,7 +30,7 @@

#define LPC47M10X2_MAX_CONFIG_REGISTER	0x5F

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47m15x/early_serial.c b/src/superio/smsc/lpc47m15x/early_serial.c
index 7e668ea..aab603b 100644
--- a/src/superio/smsc/lpc47m15x/early_serial.c
+++ b/src/superio/smsc/lpc47m15x/early_serial.c
@@ -16,6 +16,7 @@
 /* Pre-RAM driver for the SMSC LPC47M15X Super I/O chip */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>

diff --git a/src/superio/smsc/lpc47m15x/lpc47m15x.h b/src/superio/smsc/lpc47m15x/lpc47m15x.h
index 179b5c0..e905e9a 100644
--- a/src/superio/smsc/lpc47m15x/lpc47m15x.h
+++ b/src/superio/smsc/lpc47m15x/lpc47m15x.h
@@ -27,7 +27,7 @@

#define LPC47M15X2_MAX_CONFIG_REGISTER	0x5F

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void lpc47m15x_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c
index f9ff04e..5fb8d7f 100644
--- a/src/superio/smsc/lpc47n217/early_serial.c
+++ b/src/superio/smsc/lpc47n217/early_serial.c
@@ -17,6 +17,7 @@
 /* Pre-RAM driver for SMSC LPC47N217 Super I/O chip. */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <assert.h>
 #include "lpc47n217.h"

diff --git a/src/superio/smsc/lpc47n217/lpc47n217.h b/src/superio/smsc/lpc47n217/lpc47n217.h
index 1cae5a0..13b9bf3 100644
--- a/src/superio/smsc/lpc47n217/lpc47n217.h
+++ b/src/superio/smsc/lpc47n217/lpc47n217.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_SMSC_LPC47N217_LPC47N217_H
 #define SUPERIO_SMSC_LPC47N217_LPC47N217_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

/*
diff --git a/src/superio/smsc/lpc47n227/early_serial.c b/src/superio/smsc/lpc47n227/early_serial.c
index 4ae1fb7..c02b850 100644
--- a/src/superio/smsc/lpc47n227/early_serial.c
+++ b/src/superio/smsc/lpc47n227/early_serial.c
@@ -17,6 +17,7 @@
 /* Pre-RAM driver for SMSC LPC47N227 Super I/O chip. */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include "lpc47n227.h"

void pnp_enter_conf_state(pnp_devfn_t dev)
diff --git a/src/superio/smsc/lpc47n227/lpc47n227.h b/src/superio/smsc/lpc47n227/lpc47n227.h
index d629a67..5e30f65 100644
--- a/src/superio/smsc/lpc47n227/lpc47n227.h
+++ b/src/superio/smsc/lpc47n227/lpc47n227.h
@@ -16,6 +16,8 @@
 #ifndef SUPERIO_SMSC_LPC47N227_LPC47N227_H
 #define SUPERIO_SMSC_LPC47N227_LPC47N227_H

+#include <device/pnp_type.h>
+
 /*
  * Since the LPC47N227 does not have logical devices but a flat configuration
  * space, these are arbitrary, but must match declarations in the mainboard
diff --git a/src/superio/smsc/sch4037/sch4037_early_init.c b/src/superio/smsc/sch4037/sch4037_early_init.c
index 0ebd207..a416ab8 100644
--- a/src/superio/smsc/sch4037/sch4037_early_init.c
+++ b/src/superio/smsc/sch4037/sch4037_early_init.c
@@ -15,6 +15,7 @@

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>

diff --git a/src/superio/smsc/sio1036/sio1036.h b/src/superio/smsc/sio1036/sio1036.h
index 683dcd1..610beba 100644
--- a/src/superio/smsc/sio1036/sio1036.h
+++ b/src/superio/smsc/sio1036/sio1036.h
@@ -22,7 +22,7 @@
 #define LPT_POWER_DOWN		(1 << 2)
 #define IR_OUTPUT_MUX		(1 << 6)

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void sio1036_enable_serial(pnp_devfn_t dev, u16 iobase);
diff --git a/src/superio/smsc/sio1036/sio1036_early_init.c b/src/superio/smsc/sio1036/sio1036_early_init.c
index 1f2c9f2..47f317f 100644
--- a/src/superio/smsc/sio1036/sio1036_early_init.c
+++ b/src/superio/smsc/sio1036/sio1036_early_init.c
@@ -16,6 +16,7 @@
 /* Pre-RAM driver for the SMSC KBC1100 Super I/O chip */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <stdint.h>

#include "sio1036.h"
diff --git a/src/superio/smsc/smscsuperio/early_serial.c b/src/superio/smsc/smscsuperio/early_serial.c
index 27e3ef2..f058564 100644
--- a/src/superio/smsc/smscsuperio/early_serial.c
+++ b/src/superio/smsc/smscsuperio/early_serial.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>
 #include <stdint.h>

diff --git a/src/superio/smsc/smscsuperio/smscsuperio.h b/src/superio/smsc/smscsuperio/smscsuperio.h
index 9e088b8..c42328c 100644
--- a/src/superio/smsc/smscsuperio/smscsuperio.h
+++ b/src/superio/smsc/smscsuperio/smscsuperio.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_SMSC_SMSCSUPERIO_H
 #define SUPERIO_SMSC_SMSCSUPERIO_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

/* All known/supported SMSC Super I/Os have the same logical device IDs
diff --git a/src/superio/winbond/common/early_init.c b/src/superio/winbond/common/early_init.c
index 7c3ce2b..b1b8c27 100644
--- a/src/superio/winbond/common/early_init.c
+++ b/src/superio/winbond/common/early_init.c
@@ -34,6 +34,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp.h>
 #include <stdint.h>
 #include "winbond.h"
diff --git a/src/superio/winbond/common/winbond.h b/src/superio/winbond/common/winbond.h
index e8b5c25..29bfbf5 100644
--- a/src/superio/winbond/common/winbond.h
+++ b/src/superio/winbond/common/winbond.h
@@ -17,7 +17,7 @@
 #ifndef SUPERIO_WINBOND_COMMON_PRE_RAM_H
 #define SUPERIO_WINBOND_COMMON_PRE_RAM_H

-#include <arch/io.h>
+#include <device/pnp_type.h>
 #include <stdint.h>

void winbond_enable_serial(pnp_devfn_t dev, uint16_t iobase);
diff --git a/src/superio/winbond/w83627dhg/early_serial.c b/src/superio/winbond/w83627dhg/early_serial.c
index 7ec6abe..4bea678 100644
--- a/src/superio/winbond/w83627dhg/early_serial.c
+++ b/src/superio/winbond/w83627dhg/early_serial.c
@@ -16,6 +16,7 @@
  */

#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <stdint.h>
 #include "w83627dhg.h"

diff --git a/src/superio/winbond/w83627dhg/w83627dhg.h b/src/superio/winbond/w83627dhg/w83627dhg.h
index 5370437..004d5e8 100644
--- a/src/superio/winbond/w83627dhg/w83627dhg.h
+++ b/src/superio/winbond/w83627dhg/w83627dhg.h
@@ -18,7 +18,7 @@
 #ifndef SUPERIO_WINBOND_W83627DHG_H
 #define SUPERIO_WINBOND_W83627DHG_H

-#include <arch/io.h>
+#include <device/pnp_type.h>

#define W83627DHG_FDC              0   /* Floppy */
 #define W83627DHG_PP               1   /* Parallel port */
diff --git a/src/superio/winbond/w83627thg/w83627thg.h b/src/superio/winbond/w83627thg/w83627thg.h
index acea382..d254e53 100644
--- a/src/superio/winbond/w83627thg/w83627thg.h
+++ b/src/superio/winbond/w83627thg/w83627thg.h
@@ -19,7 +19,7 @@
 #ifndef SUPERIO_WINBOND_W83627THG_W83627THG_H
 #define SUPERIO_WINBOND_W83627THG_W83627THG_H

-#include <arch/io.h>
+#include <device/pnp_type.h>

#define W83627THG_FDC              0   /* Floppy */
 #define W83627THG_PP               1   /* Parallel port */
diff --git a/src/superio/winbond/wpcd376i/early_serial.c b/src/superio/winbond/wpcd376i/early_serial.c
index 115e097..9f9ff6b 100644
--- a/src/superio/winbond/wpcd376i/early_serial.c
+++ b/src/superio/winbond/wpcd376i/early_serial.c
@@ -17,7 +17,7 @@
 /* Pre-RAM driver for the Winbond WPCD376I Super I/O chip. */

-#include <arch/io.h>
+#include <device/pnp_ops.h>
 #include <device/pnp_def.h>
 #include "wpcd376i.h"

diff --git a/src/superio/winbond/wpcd376i/wpcd376i.h b/src/superio/winbond/wpcd376i/wpcd376i.h
index 4bb9289..a90b13b 100644
--- a/src/superio/winbond/wpcd376i/wpcd376i.h
+++ b/src/superio/winbond/wpcd376i/wpcd376i.h
@@ -18,7 +18,7 @@
 #ifndef SUPERIO_WINBOND_WPCD376I_WPCD376I_H
 #define SUPERIO_WINBOND_WPCD376I_WPCD376I_H

-#include <arch/io.h>
+#include <device/pnp_type.h>

/* Logical Device Numbers (LDN). */
 #define WPCD376I_FDC	0x00  /* Floppy */