Attention is currently required from: Patrick Rudolph.
Maximilian Brune has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86580?usp=email )
Change subject: cpu/x86/64bit: Allow to map more of the address space ......................................................................
Patch Set 1:
(1 comment)
File src/cpu/x86/64bit/pt1G.S:
https://review.coreboot.org/c/coreboot/+/86580/comment/5e910449_aeb4cb7f?usp... : PS1, Line 23: .rept (CONFIG_CPU_PT_ROM_MAP_GB + 511) / 512
It points to every PDPT entry in the specified address space. […]
Thats what I was trying to say. We agree on that. I would just like to see a small comment making that clear. Its not particularly important, but the page table assembly can be hard to read for people who have never seen it before, so it would be nice to have small comment explaining what the PML4E entries do. At this point we could also rename it to PML4T, since it is the table and not a single entry. Similarly to what we do down below using PDPT instead of PDPE.
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Maximilian Brune (Code Review)