Change in coreboot[master]: mb/kontron/mal10: Add COMe-mAL10 minimal support

[Maxim Polyakov (Code Review)]

Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39133 )

Change subject: mb/kontron/mal10: Add COMe-mAL10 minimal support
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Patch Set 10:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39133/8/src/mainboard/kontron/mal10... 
File src/mainboard/kontron/mal10/romstage.c:

https://review.coreboot.org/c/coreboot/+/39133/8/src/mainboard/kontron/mal10... 
PS8, Line 52: mupd->FspmConfig.Ch0_RankEnable        = 0;
            : 	mupd->FspmConfig.Ch0_DeviceWidth       = 0;
            : 	mupd->FspmConfig.Ch0_DramDensity       = 0;
            : 	mupd->FspmConfig.Ch0_Option            = 0;
            : 	mupd->FspmConfig.Ch1_RankEnable        = 0;
            : 	mupd->FspmConfig.Ch1_DeviceWidth       = 0;
            : 	mupd->FspmConfig.Ch1_DramDensity       = 0;
            : 	mupd->FspmConfig.Ch1_Option            = 0;
            : 	mupd->FspmConfig.Ch2_RankEnable        = 0;
            : 	mupd->FspmConfig.Ch2_DeviceWidth       = 0;
            : 	mupd->FspmConfig.Ch2_DramDensity       = 0;
            : 	mupd->FspmConfig.Ch2_Option            = 0;
            : 	mupd->FspmConfig.Ch3_RankEnable        = 0;
            : 	mupd->FspmConfig.Ch3_DeviceWidth       = 0;
            : 	mupd->FspmConfig.Ch3_DramDensity       = 0;
            : 	mupd->FspmConfig.Ch3_Option            = 0;
> Huh?
> I think it would be better if I remove this, because the options DIMM0SPDAddress and DIMM1SPDAddress (same as for apl_rvp1 https://github.com/coreboot/coreboot/blob/ef7a3267870f126cc2f815812cfe545008...) tell us that the memory controller uses the settings from SPD. I think that this will be enough.