Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74380 )
Change subject: soc/intel/meteoerlake: set power limits dynamically ......................................................................
soc/intel/meteoerlake: set power limits dynamically
Set power limit values dynamically based on Meteor Lake CPU TDP and PCI ID of SKU.
BRANCH=None BUG=b:270664854 TEST=Built and verified power limit values on Rex board
Change-Id: I20c9bc21dfa79696b07c460dbcedb4fa51838bdb Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/soc/intel/meteorlake/chip.h M src/soc/intel/meteorlake/chipset.cb M src/soc/intel/meteorlake/systemagent.c 3 files changed, 63 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/74380/1
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index d4abed8..5984b27 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -4,6 +4,7 @@ #define _SOC_CHIP_H_
#include <drivers/i2c/designware/dw_i2c.h> +#include <device/pci_ids.h> #include <gpio.h> #include <intelblocks/cfg.h> #include <intelblocks/gspi.h> @@ -19,13 +20,32 @@
/* Types of different SKUs */ enum soc_intel_meteorlake_power_limits { - MTL_P_POWER_LIMITS_1, - MTL_P_POWER_LIMITS_2, - MTL_P_POWER_LIMITS_3, - MTL_P_POWER_LIMITS_4, + MTL_P_682_45W_CORE, + MTL_P_282_CORE, + MTL_P_482_CORE, + MTL_P_682_28W_CORE, MTL_POWER_LIMITS_COUNT };
+/* TDP values for different SKUs */ +enum soc_intel_meteorlake_cpu_tdps { + TDP_15W = 15, + TDP_28W = 28, + TDP_45W = 45 +}; + +/* Mapping of different SKUs based on CPU ID and TDP values */ +static const struct { + unsigned int cpu_id; + enum soc_intel_meteorlake_power_limits limits; + enum soc_intel_meteorlake_cpu_tdps cpu_tdp; +} cpuid_to_mtl[] = { + { PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_CORE, TDP_15W }, + { PCI_DID_INTEL_MTL_P_ID_3, MTL_P_482_CORE, TDP_28W }, + { PCI_DID_INTEL_MTL_P_ID_4, MTL_P_682_28W_CORE, TDP_28W }, +}; + /* Types of display ports */ enum ddi_ports { DDI_PORT_A, diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 0962a7c..5b73898 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -3,14 +3,16 @@ device cpu_cluster 0 on end
#FIXME: update values for MTL and enable override in systemagent.c - register "power_limits_config[MTL_P_POWER_LIMITS_2]" = "{ + register "power_limits_config[MTL_P_282_CORE]" = "{ .tdp_pl1_override = 15, - .tdp_pl2_override = 55, + .tdp_pl2_override = 57, + .tdp_pl4 = 101, }"
- register "power_limits_config[MTL_P_POWER_LIMITS_1]" = "{ + register "power_limits_config[MTL_P_682_45W_CORE]" = "{ .tdp_pl1_override = 45, .tdp_pl2_override = 115, + .tdp_pl4 = 197, }"
# NOTE: if any variant wants to override this value, use the same format diff --git a/src/soc/intel/meteorlake/systemagent.c b/src/soc/intel/meteorlake/systemagent.c index 81e4bed..fc152cf 100644 --- a/src/soc/intel/meteorlake/systemagent.c +++ b/src/soc/intel/meteorlake/systemagent.c @@ -5,7 +5,6 @@ #include <cpu/x86/msr.h> #include <device/device.h> #include <device/pci.h> -#include <device/pci_ids.h> #include <delay.h> #include <intelblocks/cpulib.h> #include <intelblocks/msr.h> @@ -155,6 +154,8 @@ struct soc_power_limits_config *soc_config; struct device *sa; uint16_t sa_pci_id; + u8 tdp; + size_t i; config_t *config;
/* Enable Power Aware Interrupt Routing */ @@ -166,31 +167,24 @@ sa = pcidev_path_on_root(PCI_DEVFN_ROOT); sa_pci_id = sa ? pci_read_config16(sa, PCI_DEVICE_ID) : 0xFFFF;
- /* Choose a power limits configuration based on the SoC SKU type, - * differentiated here based on SA PCI ID. */ - switch (sa_pci_id) { - case PCI_DID_INTEL_MTL_P_ID_1: - soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_1]; - break; - case PCI_DID_INTEL_MTL_P_ID_2: - soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_2]; - break; - case PCI_DID_INTEL_MTL_P_ID_3: - soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_3]; - break; - case PCI_DID_INTEL_MTL_P_ID_4: - soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_4]; - break; - default: - printk(BIOS_ERR, "unknown SA ID: 0x%4x, skipping power limits configuration\n", + tdp = get_cpu_tdp(); + + /* Choose power limits configuration based on the CPU SA PCI ID and + * CPU TDP value. */ + for (i = 0; i < ARRAY_SIZE(cpuid_to_mtl); i++) { + if (sa_pci_id == cpuid_to_mtl[i].cpu_id && + tdp == cpuid_to_mtl[i].cpu_tdp) { + soc_config = &config->power_limits_config[cpuid_to_mtl[i].limits]; + set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config); + break; + } + } + + if (i == ARRAY_SIZE(cpuid_to_mtl)) { + printk(BIOS_ERR, "Unknown SA ID: 0x%4x, skipped power limits configuration.\n", sa_pci_id); return; } - - /* Remove once commented line below is enabled */ - (void)soc_config; - /* UPDATEME: Need to enable later */ - //set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config); }
uint32_t soc_systemagent_max_chan_capacity_mib(u8 capid0_a_ddrsz)
-
Sumeet R Pawnikar (Code Review)