[S] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Tidy GPIO comments for PCH

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87077?usp=email )

Change subject: mb/starlabs/starbook/adl_n: Tidy GPIO comments for PCH
......................................................................

mb/starlabs/starbook/adl_n: Tidy GPIO comments for PCH

This is a non-functional change, and only makes the GPIOs easier to read.

Change-Id: I710f3ab84a4c6d76941a2a7dc3d41f87ba0c0415
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87077
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
1 file changed, 8 insertions(+), 10 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
index 4fdabc5..782538a 100644
--- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
+++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
@@ -64,6 +64,13 @@
    PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),				/* Data Input */
    PAD_CFG_NF(GPP_R4, NATIVE, DEEP, NF1),				/* Reset */

+	/* PCH */
+	PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),				/* C10 Gate */
+	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),				/* Platform Reset */
+	PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),				/* Vendor ID 0 */
+	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),				/* Vendor ID 1 */
+	PAD_CFG_GPI_SCI(GPP_B2, NONE, PLTRST, EDGE_SINGLE, INVERT),	/* Processor Hot */
+
    PAD_NC(GPD2, NONE),
    PAD_NC(GPD6, NONE),
    /* GPD7:	Power Adapter Disable				*/
@@ -101,12 +108,7 @@
    /* A23:		Not Connected					*/
    PAD_NC(GPP_A23, NONE),

-	/* B0:		Core Vendor ID 0				*/
-	PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
-	/* B1:		Core Vendor ID 1				*/
-	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
-	/* B2:		BC PROCHOT					*/
-	PAD_CFG_GPI_SCI(GPP_B2, NONE, PLTRST, EDGE_SINGLE, INVERT),
+
    /* B3:		Not Connected					*/
    PAD_NC(GPP_B3, NONE),
    /* B4:		Not Connected					*/
@@ -123,8 +125,6 @@
    PAD_NC(GPP_B11, NONE),
    /* B12:		PM SLP S0					*/
    PAD_NC(GPP_B12, NONE),
-	/* B13:		PLT RST						*/
-	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
    /* B14:		Top Swap Override	Weak Internal PD 20K
    			High:	Enabled
    			Low:	Disabled			*/
@@ -362,8 +362,6 @@
    PAD_NC(GPP_H14, NONE),
    /* H16:		Not Connected					*/
    PAD_NC(GPP_H16, NONE),
-	/* H18:		CPI C10 Gate					*/
-	PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
    /* H19:		Clock Request 4		CPU M.2 SSD		*/
    PAD_NC(GPP_H19, NONE),
    /* H20:		Not Connected					*/