Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh.
Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/86424?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins)
Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ......................................................................
src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
Process the single SPD data file which resides in cbfs. Add KConfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additional to load the memory confiugration FSP-M parameters for the romstage are set.
Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn johannes-hahn@siemens.com --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c A src/mainboard/siemens/fa_ehl/spd/Makefile.mk R src/mainboard/siemens/fa_ehl/spd/Nanya_NT6AP512T32BV-J1I.spd.hex A src/mainboard/siemens/fa_ehl/spd/spd.h M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c 9 files changed, 32 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/3