Change in coreboot[master]: soc/intel/alderlake: Enable VT-d

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Meera Ravindranath, Subrata Banik, Ronak Kanabar, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51849 )

Change subject: soc/intel/alderlake: Enable VT-d
......................................................................

Patch Set 5:

(1 comment)

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/51849/comment/571134e7_1120a96f 
PS5, Line 204: 		#if (GFXVT_BASE_ADDRESS == 0)
             : 			#error "Error: GFXVT_BASE_ADDRESS should be non-zero for enabling VT-d!"
             : 		#endif
I think it's OK to have these as runtime checks, for example:
```
if (m_cfg->VtdIgdEnable && GFXVT_BASE_ADDRESS == 0) {
   m_cfg->VtdIgdEnable = 0;
   printk(BIOS_ERR, "ERROR: Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
}
```