Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46247 )
Change subject: mb/asrock/h110m/romstage.c: Drop invalid SPD addresses ......................................................................
mb/asrock/h110m/romstage.c: Drop invalid SPD addresses
Pictures on the internet show that the Asrock H110M-DVS (Kconfig.name) only has two DIMM slots. Since the vendor's website advertises support for dual channel memory, drop the SPD addresses for the second slot of each channel. The result is the same as several other two-slot boards.
Change-Id: I4b62e9196bfa3a688016399d7e025ca995f3c12c Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/asrock/h110m/romstage.c 1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/46247/1
diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c index 8e72e8e..ca3058f 100644 --- a/src/mainboard/asrock/h110m/romstage.c +++ b/src/mainboard/asrock/h110m/romstage.c @@ -15,7 +15,7 @@ FSP_M_CONFIG *const mem_cfg = &mupd->FspmConfig;
struct spd_block blk = { - .addr_map = { 0x50, 0x51, 0x52, 0x53, }, + .addr_map = { 0x50, 0x52 }, };
assert(sizeof(mem_cfg->RcompResistor) == sizeof(rcomp_resistors)); @@ -25,9 +25,7 @@ get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; - mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2]; - mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1]; - mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3]; + mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; dump_spd_info(&blk);
memcpy(mem_cfg->RcompResistor, rcomp_resistors, sizeof(mem_cfg->RcompResistor));
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46247 )
Change subject: mb/asrock/h110m/romstage.c: Drop invalid SPD addresses ......................................................................
Patch Set 1: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46247 )
Change subject: mb/asrock/h110m/romstage.c: Drop invalid SPD addresses ......................................................................
mb/asrock/h110m/romstage.c: Drop invalid SPD addresses
Pictures on the internet show that the Asrock H110M-DVS (Kconfig.name) only has two DIMM slots. Since the vendor's website advertises support for dual channel memory, drop the SPD addresses for the second slot of each channel. The result is the same as several other two-slot boards.
Change-Id: I4b62e9196bfa3a688016399d7e025ca995f3c12c Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46247 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/mainboard/asrock/h110m/romstage.c 1 file changed, 2 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/asrock/h110m/romstage.c b/src/mainboard/asrock/h110m/romstage.c index 8e72e8e..ca3058f 100644 --- a/src/mainboard/asrock/h110m/romstage.c +++ b/src/mainboard/asrock/h110m/romstage.c @@ -15,7 +15,7 @@ FSP_M_CONFIG *const mem_cfg = &mupd->FspmConfig;
struct spd_block blk = { - .addr_map = { 0x50, 0x51, 0x52, 0x53, }, + .addr_map = { 0x50, 0x52 }, };
assert(sizeof(mem_cfg->RcompResistor) == sizeof(rcomp_resistors)); @@ -25,9 +25,7 @@ get_spd_smbus(&blk); mem_cfg->MemorySpdDataLen = blk.len; mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; - mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2]; - mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1]; - mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3]; + mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; dump_spd_info(&blk);
memcpy(mem_cfg->RcompResistor, rcomp_resistors, sizeof(mem_cfg->RcompResistor));
-
Angel Pons (Code Review) -
Michael Niewöhner (Code Review)