Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/50127 )
Change subject: drivers/intel/dptf: Add OEM variables support ......................................................................
drivers/intel/dptf: Add OEM variables support
This adds OEM variables feature under DPTF as per BWG doc #541817. Using this, platform vendors can expose an array of OEM-specific values as OEM variables to be used in determining DPTF policy. These are obtained via the ODVP method, and then simply exposed under sysfs. In addition, these gets updated when a notification is received or when the DPTF policy is changed by userspace.
BRANCH=None BUG=b:187253038 TEST=Built and tested on dedede board
Change-Id: Iaf3cf7b40e9a441b41d0c659d76895a58669c2fb Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/50127 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/drivers/intel/dptf/chip.h M src/drivers/intel/dptf/dptf.c 2 files changed, 56 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/drivers/intel/dptf/chip.h b/src/drivers/intel/dptf/chip.h index 5408d9e..59b1e25 100644 --- a/src/drivers/intel/dptf/chip.h +++ b/src/drivers/intel/dptf/chip.h @@ -12,6 +12,9 @@ {.source = DPTF_##src, .temp = (tmp), .type = DPTF_CRITICAL_##typ} #define TEMP_PCT(t, p) {.temp = (t), .fan_pct = (p)}
+/* Total number of OEM variables */ +#define DPTF_OEM_VARIABLE_COUNT 6 + struct drivers_intel_dptf_config { struct { struct dptf_active_policy active[DPTF_MAX_ACTIVE_POLICIES]; @@ -51,6 +54,11 @@ const char *desc; } tsr[DPTF_MAX_TSR]; } options; + + /* OEM variables */ + struct { + uint32_t oem_variables[DPTF_OEM_VARIABLE_COUNT]; + } oem_data; };
#endif /* _DRIVERS_INTEL_DPTF_CHIP_H_ */ diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c index 7d19df5..f9b4dee 100644 --- a/src/drivers/intel/dptf/dptf.c +++ b/src/drivers/intel/dptf/dptf.c @@ -117,6 +117,53 @@ acpigen_pop_len(); /* Device */ }
+/* _SB.DPTF */ +static void write_oem_variables(const struct drivers_intel_dptf_config *config) +{ + int i; + + acpigen_write_name("ODVX"); + acpigen_write_package(DPTF_OEM_VARIABLE_COUNT); + for (i = 0; i < DPTF_OEM_VARIABLE_COUNT; i++) + acpigen_write_dword(config->oem_data.oem_variables[i]); + acpigen_write_package_end(); + + /* + * Method (ODUP, 2) + * Arg0 = Index of ODVX to update + * Arg1 = Value to place in ODVX[Arg0] + */ + acpigen_write_method_serialized("ODUP", 2); + /* ODVX[Arg0] = Arg1 */ + acpigen_write_store(); + acpigen_emit_byte(ARG1_OP); + acpigen_emit_byte(INDEX_OP); + acpigen_emit_namestring("ODVX"); + acpigen_emit_byte(ARG0_OP); + acpigen_emit_byte(ZERO_OP); /* Ignore Index() Destination */ + acpigen_write_method_end(); + + /* + * Method (ODGT, 1) + * Arg0 = Index of ODVX to get + */ + acpigen_write_method_serialized("ODGT", 1); + /* Return (ODVX[Arg0]) */ + acpigen_emit_byte(RETURN_OP); + acpigen_emit_byte(DEREF_OP); + acpigen_emit_byte(INDEX_OP); + acpigen_emit_namestring("ODVX"); + acpigen_emit_byte(ARG0_OP); + acpigen_emit_byte(ZERO_OP); /* Ignore Index() Destination */ + acpigen_write_method_end(); + + /* Method (ODVP) { Return (ODVX) } */ + acpigen_write_method_serialized("ODVP", 0); + acpigen_emit_byte(RETURN_OP); + acpigen_emit_namestring("ODVX"); + acpigen_write_method_end(); +} + /* _SB.DPTF.xxxx */ static void write_generic_devices(const struct drivers_intel_dptf_config *config, const struct dptf_platform_info *platform_info) @@ -169,6 +216,7 @@ write_tcpu(parent, config); write_open_dptf_device(dev, platform_info); write_fan(config, platform_info); + write_oem_variables(config); write_generic_devices(config, platform_info);
acpigen_pop_len(); /* DPTF Device (write_open_dptf_device) */