Change in coreboot[master]: mb/google/brask/variants/moli: update vgpio setting for audio

[Casper Chang (Code Review)]

Casper Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63973 )

Change subject: mb/google/brask/variants/moli: update vgpio setting for audio
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mb/google/brask/variants/moli: update vgpio setting for audio

Add vgpio setting for NAU88L25B on Moli.

BUG=b:230875400
TEST=emerge-brask coreboot. verify audio output by aplay.

Signed-off-by: Casper Chang 
Change-Id: I16894ff5017b443c491282c2cd1c868e12c1b63b
---
M src/mainboard/google/brya/variants/moli/Makefile.inc
A src/mainboard/google/brya/variants/moli/variant.c
2 files changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/63973/1

diff --git a/src/mainboard/google/brya/variants/moli/Makefile.inc b/src/mainboard/google/brya/variants/moli/Makefile.inc
index f5c5897..7471e4d 100644
--- a/src/mainboard/google/brya/variants/moli/Makefile.inc
+++ b/src/mainboard/google/brya/variants/moli/Makefile.inc
@@ -5,3 +5,4 @@

ramstage-y += gpio.c
 ramstage-y += ramstage.c
+ramstage-y += variant.c
\ No newline at end of file
diff --git a/src/mainboard/google/brya/variants/moli/variant.c b/src/mainboard/google/brya/variants/moli/variant.c
new file mode 100644
index 0000000..80c568e
--- /dev/null
+++ b/src/mainboard/google/brya/variants/moli/variant.c
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <chip.h>
+#include <fw_config.h>
+#include <baseboard/variants.h>
+#include <variant/gpio.h>
+#include <acpi/acpigen.h>
+
+static const struct pad_config bt_i2s_enable_pads[] = {
+	PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3),	/* BT_I2S_BCLK */
+	PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3),	/* BT_I2S_SYNC */
+	PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3),	/* BT_I2S_SDO */
+	PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3),	/* BT_I2S_SDI */
+	PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1),	/* SSP2_SCLK */
+	PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1),	/* SSP2_SFRM */
+	PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1),	/* SSP_TXD */
+	PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1),	/* SSP_RXD */
+};
+
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
+{
+	printk(BIOS_INFO, "BT offload enabled over I2S with NAU88L25B\n");
+	gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
+}
\ No newline at end of file