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I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/50105
to look at the new patch set (#3).
Change subject: mb/google/volteer: Change cTDP level to level 2 (15W) ......................................................................
mb/google/volteer: Change cTDP level to level 2 (15W)
Change the cTDP level from base (28W) to level 2 (15W) to align with PL1. The change is for UP3 variants, UP4 variants should keep base TDP level (9W) which already align with PL1. Refer to Tigerlake TDP specifications (doc #575683, table 4-2) for details
BUG=b:179283734 TEST=build and boot system, check MSR 0x64B, bit 1:0 should be 2
Change-Id: I4420a6a2e463b0a6bd7eb4b81f6a4fb975895ea3 Signed-off-by: Derek Huang derek.huang@intel.corp-partner.google.com --- M src/mainboard/google/volteer/variants/delbin/overridetree.cb M src/mainboard/google/volteer/variants/drobit/overridetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/elemi/overridetree.cb M src/mainboard/google/volteer/variants/lindar/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb M src/mainboard/google/volteer/variants/voxel/overridetree.cb M src/soc/intel/tigerlake/romstage/fsp_params.c 8 files changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/50105/3