Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12601
-gerrit
commit 24e6522e808fcc5e3c3298467c40b713a6197b6b Author: Mary Ruthven mruthven@chromium.org Date: Tue Nov 24 09:43:27 2015 -0800
cbfs_spi: Initialize spi_flash when initializing cbfs_cache
Most devices do not use SPI before they initialize CBMEM. This change initializes spi_flash in the CBMEM_INIT_HOOK to initialize the postram cbfs cache so it is not overwritten when boot_device_init is called later.
BUG=chromium:210230 BRANCH=none TEST=confirm that the first cbfs access can occur before RAM initialized and after on panther and jerry.
Change-Id: If3b6efc04082190e81c3773c0d3ce116bb12421f Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 0ab242786a16eba7fb423694f6b266e27d7660ec Original-Change-Id: I5f884b473e51e6813fdd726bba06b56baf3841b0 Original-Signed-off-by: Mary Ruthven mruthven@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/314311 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/include/memlayout.h | 2 +- src/include/symbols.h | 6 +++--- src/lib/cbfs_spi.c | 9 ++++++++- 3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/src/include/memlayout.h b/src/include/memlayout.h index 899836c..3178bc4 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -82,7 +82,7 @@ #if ENV_ROMSTAGE #define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) #define POSTRAM_CBFS_CACHE(addr, size) \ - REGION(dram_cbfs_cache, addr, size, 4) + REGION(postram_cbfs_cache, addr, size, 4) #elif defined(__PRE_RAM__) #define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) #define POSTRAM_CBFS_CACHE(addr, size) \ diff --git a/src/include/symbols.h b/src/include/symbols.h index bf875ae..aa055ec 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -41,9 +41,9 @@ extern u8 _stack[]; extern u8 _estack[]; #define _stack_size (_estack - _stack)
-extern u8 _dram_cbfs_cache[]; -extern u8 _edram_cbfs_cache[]; -#define _dram_cbfs_cache_size (_edram_cbfs_cache - _dram_cbfs_cache) +extern u8 _postram_cbfs_cache[]; +extern u8 _epostram_cbfs_cache[]; +#define _postram_cbfs_cache_size (_epostram_cbfs_cache - _postram_cbfs_cache)
extern u8 _cbfs_cache[]; extern u8 _ecbfs_cache[]; diff --git a/src/lib/cbfs_spi.c b/src/lib/cbfs_spi.c index 82c3b83..ffa0628 100644 --- a/src/lib/cbfs_spi.c +++ b/src/lib/cbfs_spi.c @@ -45,7 +45,14 @@ static struct mmap_helper_region_device mdev =
static void initialize_mdev(int unused) { - mmap_helper_device_init(&mdev, _dram_cbfs_cache, _dram_cbfs_cache_size); + /* + * Call boot_device_init() to ensure spi_flash is initialized before + * backing mdev with postram cache. This prevents the mdev backing from + * being overwritten if spi_flash was not accessed before dram was up. + */ + boot_device_init(); + mmap_helper_device_init(&mdev, _postram_cbfs_cache, + _postram_cbfs_cache_size); } ROMSTAGE_CBMEM_INIT_HOOK(initialize_mdev);