Change in coreboot[master]: [WIP] soc/intel/denverton: Handle MMCONF_BASE_ADDRESS

[Angel Pons (Code Review)]

Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50665 )

Change subject: [WIP] soc/intel/denverton: Handle MMCONF_BASE_ADDRESS
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Patch Set 1:

(1 comment)

Patchset:

PS1:
> I figured so too. We should get someone to test if FSP overrides it if we get to enable it first.

If we know when (inside which blob) MMCONF gets enabled, we can also reprogram the register afterwards, using the Kconfig setting.

In any case, I'd appreciate if the Denverton-NS maintainers could shed some light on this.