Change in coreboot[master]: nb/intel/fsp_rangeley: Get rid off device_t

[Elyes HAOUAS (Code Review)]

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/23671

Change subject: nb/intel/fsp_rangeley: Get rid off device_t
......................................................................

nb/intel/fsp_rangeley: Get rid off device_t

Use of `device_t` has been
abandoned in ramstage

Change-Id: I0b969a5109276d108e6140bad338c74786b967f3
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/fsp_rangeley/acpi.c
M src/northbridge/intel/fsp_rangeley/northbridge.c
M src/northbridge/intel/fsp_rangeley/northbridge.h
3 files changed, 12 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/23671/1

diff --git a/src/northbridge/intel/fsp_rangeley/acpi.c b/src/northbridge/intel/fsp_rangeley/acpi.c
index 00947aa..c8e6d45 100644
--- a/src/northbridge/intel/fsp_rangeley/acpi.c
+++ b/src/northbridge/intel/fsp_rangeley/acpi.c
@@ -30,7 +30,7 @@

unsigned long acpi_fill_mcfg(unsigned long current)
 {
-	device_t dev;
+	struct device *dev;
    u32 pciexbar = 0;
    u32 pciexbar_reg;
    int max_buses;
@@ -61,7 +61,7 @@
    return current;
 }

-void northbridge_acpi_fill_ssdt_generator(device_t device)
+void northbridge_acpi_fill_ssdt_generator(struct device *device)
 {
    u32 bmbound;
    char pscope[] = "\_SB.PCI0";
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 0134eff..22e6cee 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -59,7 +59,7 @@

static int get_pcie_bar(u32 *base)
 {
-	device_t dev;
+	struct device *dev;
    u32 pciexbar_reg;

*base = 0;
@@ -94,7 +94,7 @@
    return index;
 }

-static void mc_add_dram_resources(device_t dev)
+static void mc_add_dram_resources(struct device *dev)
 {
    u32 tomlow, bmbound, bsmmrrl, bsmmrrh;
    u64 bmbound_hi;
@@ -139,7 +139,7 @@
    index = add_fixed_resources(dev, index);
 }

-static void mc_read_resources(device_t dev)
+static void mc_read_resources(struct device *dev)
 {
    u32 pcie_config_base;
    int buses;
@@ -158,7 +158,7 @@
    mc_add_dram_resources(dev);
 }

-static void pci_domain_set_resources(device_t dev)
+static void pci_domain_set_resources(struct device *dev)
 {
    /*
     * Assign memory resources for PCI devices
@@ -168,13 +168,13 @@
    assign_resources(dev->link_list);
 }

-static void mc_set_resources(device_t dev)
+static void mc_set_resources(struct device *dev)
 {
    /* Call the normal set_resources */
    pci_dev_set_resources(dev);
 }

-static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void intel_set_subsystem(struct device *dev, unsigned vendor, unsigned device)
 {
    if (!vendor || !device) {
    	pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
@@ -189,7 +189,7 @@
 {
 }

-static void northbridge_enable(device_t dev)
+static void northbridge_enable(struct device *dev)
 {
 }

@@ -239,7 +239,7 @@
    .devices = pci_device_ids,
 };

-static void cpu_bus_init(device_t dev)
+static void cpu_bus_init(struct device *dev)
 {
    initialize_cpus(dev->link_list);
 }
@@ -252,7 +252,7 @@
    .scan_bus         = 0,
 };

-static void enable_dev(device_t dev)
+static void enable_dev(struct device *dev)
 {
    /* Set the operations if it is a special bus type */
    if (dev->path.type == DEVICE_PATH_DOMAIN) {
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h
index ba4cfdd..f68d175 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.h
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.h
@@ -73,7 +73,7 @@
 void report_platform_info(void);

#ifndef __SIMPLE_DEVICE__
-void northbridge_acpi_fill_ssdt_generator(device_t device);
+void northbridge_acpi_fill_ssdt_generator(struct device *device);
 #endif

#endif /* #ifndef __ASSEMBLER__ */