[XS] Change in coreboot[main]: mb/google/nissa/var/telith: Configure Acoustic noise mitigation

[Kun Liu (Code Review)]

Kun Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85826?usp=email )

Change subject: mb/google/nissa/var/telith: Configure Acoustic noise mitigation
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mb/google/nissa/var/telith: Configure Acoustic noise mitigation

- Enable Acoustic noise mitigation
- Set slow slew rate VCCIA and VCCGT to SLEW_FAST_8
- Set FastPkgCRampDisable VCCIA and VCCGT to 1

BUG=b:387056119
BRANCH=none
TEST=built firmware and verified by power team, and noise pass.

Change-Id: I11e1fae6d0b8508760090956ca6d77b012aa4bad
Signed-off-by: Kun Liu 
---
M src/mainboard/google/brya/variants/telith/overridetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/85826/1

diff --git a/src/mainboard/google/brya/variants/telith/overridetree.cb b/src/mainboard/google/brya/variants/telith/overridetree.cb
index 964d49c..cac770f 100644
--- a/src/mainboard/google/brya/variants/telith/overridetree.cb
+++ b/src/mainboard/google/brya/variants/telith/overridetree.cb
@@ -20,6 +20,13 @@
 chip soc/intel/alderlake
    register "sagv" = "SaGv_Enabled"

+	# Acoustic settings
+	register "acoustic_noise_mitigation" = "1"
+	register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
+	register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
+	register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
+	register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
+
    # EMMC Tx CMD Delay
    # Refer to EDS-Vol2-42.3.7.
    # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.