[S] Change in coreboot[main]: tree: Use boolean for skip_ext_gfx_scan

[Elyes Haouas (Code Review)]

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84154?usp=email )

Change subject: tree: Use boolean for skip_ext_gfx_scan
......................................................................

tree: Use boolean for skip_ext_gfx_scan

Change-Id: I569b9a69add341bcefe6bd5356b01a95a4e97286
Signed-off-by: Elyes Haouas 
---
M src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
M src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
M src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
M src/soc/intel/pantherlake/chip.h
5 files changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/84154/1

diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
index 7cb10d2..c0ef101 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree.cb
@@ -70,7 +70,7 @@
    register "energy_perf_pref_value" = "0x73"

# Set on-board graphics as primary display
-	register "skip_ext_gfx_scan" = "1"
+	register "skip_ext_gfx_scan" = "true"

register "serial_io_uart_mode" = "{
    	[PchSerialIoIndexUART0] = PchSerialIoPci,
diff --git a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
index 7358eeb..f0f9598 100644
--- a/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
@@ -68,7 +68,7 @@
    register "sagv_gear[3]" = "2"

# Set on-board graphics as primary display
-	register "skip_ext_gfx_scan" = "1"
+	register "skip_ext_gfx_scan" = "true"

register "serial_io_uart_mode" = "{
    	[PchSerialIoIndexUART0] = PchSerialIoPci,
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 00acbec..7626083 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -70,7 +70,7 @@
    register "energy_perf_pref_value" = "0x73"

# Set on-board graphics as primary display
-	register "skip_ext_gfx_scan" = "1"
+	register "skip_ext_gfx_scan" = "true"

register "serial_io_uart_mode" = "{
    	[PchSerialIoIndexUART0] = PchSerialIoSkipInit,
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
index 625a36b..d3038f5 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
@@ -65,7 +65,7 @@
    register "sagv_gear[3]" = "2"

# Set on-board graphics as primary display
-	register "skip_ext_gfx_scan" = "1"
+	register "skip_ext_gfx_scan" = "true"

register "serial_io_uart_mode" = "{
    	[PchSerialIoIndexUART0] = PchSerialIoPci,
diff --git a/src/soc/intel/pantherlake/chip.h b/src/soc/intel/pantherlake/chip.h
index 589ce14..d1dbe44 100644
--- a/src/soc/intel/pantherlake/chip.h
+++ b/src/soc/intel/pantherlake/chip.h
@@ -179,7 +179,7 @@
    	IGD_SM_56MB = 0xFD,
    	IGD_SM_60MB = 0xFE,
    } IgdDvmt50PreAlloc;
-	uint8_t skip_ext_gfx_scan;
+	bool skip_ext_gfx_scan;

/* CNVi WiFi Core Enable/Disable */
    bool cnvi_wifi_core;