Change in coreboot[master]: mb/google/brya: Enable RTD3 for SD card

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57839 )

Change subject: mb/google/brya: Enable RTD3 for SD card
......................................................................

mb/google/brya: Enable RTD3 for SD card

Enable the PCIe RTD3 driver for the PCIe attached SD card interface
and specify the srcclk pin and reset GPIO.

TEST=Tested on brya platform to ensure the system can enter the
S0ix state and suspend/resume is stable

Signed-off-by: Rizwan Qureshi 
Change-Id: I9995234570e8c5b830265c1c6a04d4501deff44f
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/57839/1

diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 6f55770..0ee6520 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -161,6 +161,11 @@
    			.clk_req = 3,
    			.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
    		}"
+			chip soc/intel/common/block/pcie/rtd3
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
+				register "srcclk_pin" = "3"
+				device generic 0 on end
+			end
    	end	#PCIE8 SD card
    	device ref pcie_rp9 on
    		# Enable NVMe PCIE 9 using clk 1