Change in ...coreboot[master]: src/soc/intel/braswell/southcluster.c: Correct serial IRQ support
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29398 )
Change subject: src/soc/intel/braswell/southcluster.c: Correct serial IRQ support ......................................................................
Patch Set 6:
(1 comment)
Please makes this a `chip.h` setting, as this doesn't make much sense as a Kconfig option (I'm about to update older platforms regarding this). cf. CB:31596
AIUI, it should be enabled for the Google boards as they use it for their EC. Which makes me wonder if their FSP binary enables it.
https://review.coreboot.org/#/c/29398/6/src/soc/intel/braswell/southcluster.... File src/soc/intel/braswell/southcluster.c:
https://review.coreboot.org/#/c/29398/6/src/soc/intel/braswell/southcluster.... PS6, Line 621: This was added and removed and added back on the cros firmware branches. ^^
If serirq really isn't enabled, this shouldn't have made a difference.... Matt, can you test if serirq is enabled by the Google blob?
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Nico Huber (Code Review)