Change in coreboot[master]: soc/intel/skylake: [WIP] Library for working with RW_UCODE_UPDATE NV ...

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/27368

Change subject: soc/intel/skylake: [WIP] Library for working with RW_UCODE_UPDATE NV region
......................................................................

soc/intel/skylake: [WIP] Library for working with RW_UCODE_UPDATE NV region

Change-Id: I40e8d315618962b50d6fed97fa094b941246c934
Signed-off-by: Rizwan Qureshi 
---
M src/soc/intel/skylake/Makefile.inc
A src/soc/intel/skylake/fw_update_nv.c
A src/soc/intel/skylake/include/soc/fw_update_nv.h
3 files changed, 92 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/27368/1

diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index 89e48f1..fe687ce 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -28,6 +28,7 @@
 verstage-y += spi.c
 verstage-$(CONFIG_UART_DEBUG) += uart.c

+romstage-y += fw_update_nv.c
 romstage-y += gpio.c
 romstage-y += gspi.c
 romstage-y += i2c.c
diff --git a/src/soc/intel/skylake/fw_update_nv.c b/src/soc/intel/skylake/fw_update_nv.c
new file mode 100644
index 0000000..fced985
--- /dev/null
+++ b/src/soc/intel/skylake/fw_update_nv.c
@@ -0,0 +1,63 @@
+
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 The ChromiumOS Authors.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <assert.h>
+#include <commonlib/region.h>
+#include <console/console.h>
+#include <string.h>
+#include <fmap.h>
+#include <ip_checksum.h>
+#include <soc/fw_update_nv.h>
+
+int get_update_nv_storage(struct region_device *rdev)
+{
+	if (fmap_locate_area_as_rdev_rw("RW_UPDATE_STATE", rdev)){
+		printk(BIOS_ERR, "%s: failed to locate UPDATE NVRAM\n", __func__);
+		return 1;
+	}
+	return 0;
+}
+
+int get_update_state(struct region_device *rdev,
+					struct fw_update_nv *update_state) {
+
+	/* read the nvdata and write it to the cache */
+	if (rdev_readat(rdev, (void *) update_state, INIT_OFFSET,
+					FW_UPDATE_NV_DATA_SIZE) < 0) {
+		printk(BIOS_ERR, "failed to read nvdata\n");
+		return 1;
+	}
+	printk (BIOS_ERR, "ucode: 0x%x\ncse: 0x%x\n",
+			update_state->ucode_state,
+				update_state->cse_state);
+	return 0;
+}
+
+int set_update_state(struct region_device *rdev,
+					struct fw_update_nv *update_state) {
+
+	update_state->checksum = compute_ip_checksum(
+				(void *)update_state,
+				FW_UPDATE_NV_DATA_SIZE);
+
+	if (rdev_writeat(rdev, update_state, 0, FW_UPDATE_NV_DATA_SIZE) !=
+		FW_UPDATE_NV_DATA_SIZE) {
+		printk(BIOS_ERR, "failed to Write nvdata\n");
+		return 1;
+	}
+	return 0;
+}
+
diff --git a/src/soc/intel/skylake/include/soc/fw_update_nv.h b/src/soc/intel/skylake/include/soc/fw_update_nv.h
new file mode 100644
index 0000000..b120aa5
--- /dev/null
+++ b/src/soc/intel/skylake/include/soc/fw_update_nv.h
@@ -0,0 +1,28 @@
+#define FW_UPDATE_NV_DATA_SIZE 16
+#define ERASE_VALUE 0xff
+
+enum update_state {
+	UPDATE_VERIFIED,
+	UPDATE_START,
+	UPDATE_WRITE_COMPLETE
+};
+
+enum update_nv_offsets {
+	INIT_OFFSET,
+	UCODE_UPDATE_NV_OFFSET=1,
+	CSE_UPDATE_NV_OFFSET=2,
+};
+
+struct fw_update_nv {
+	char initialized;
+	enum update_state ucode_state;
+	enum update_state cse_state;
+	uint16_t checksum;
+	char unused[5];
+};
+
+int get_update_nv_storage(struct region_device *rdev);
+int get_update_state(struct region_device *rdev,
+					struct fw_update_nv *update_state);
+int set_update_state(struct region_device *rdev,
+					struct fw_update_nv *update_state);