Change in coreboot[master]: sb/intel/i82801{i,j}x: Fix conversion from 'int' to 'signed char:6'

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37342 )

Change subject: sb/intel/i82801{i,j}x: Fix conversion from 'int' to 'signed char:6'
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sb/intel/i82801{i,j}x: Fix conversion from 'int' to 'signed char:6'

Error found using option -Wconversion:
"error: conversion from 'int' to 'signed char:6' changes value from '49' to '-15'"

Change-Id: I3cdf4bf1b78b463846b3070ad4c6e82a7a329f5f
Signed-off-by: Elyes HAOUAS 
---
M src/southbridge/intel/i82801ix/chip.h
M src/southbridge/intel/i82801jx/chip.h
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/37342/1

diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h
index 73ee822..a11e00b 100644
--- a/src/southbridge/intel/i82801ix/chip.h
+++ b/src/southbridge/intel/i82801ix/chip.h
@@ -79,7 +79,7 @@
    int throttle_duty : 3;

/* Bit mask to tell whether a PCIe slot is implemented as slot. */
-	int pcie_slot_implemented : 6;
+	signed char pcie_slot_implemented : 6;

/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
    struct {
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index e4c68fb..d84de8e 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -69,7 +69,7 @@
    int throttle_duty : 3;

/* Bit mask to tell whether a PCIe slot is implemented as slot. */
-	int pcie_slot_implemented : 6;
+	signed char pcie_slot_implemented : 6;

/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
    struct {

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37342 )

Change subject: sb/intel/i82801{i,j}x: Fix conversion from 'int' to 'signed char:6'
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Abandoned

see 34092