[M] Change in coreboot[main]: soc/amd/genoa: Add timer & tsc support

[Varshit Pandya (Code Review)]

Attention is currently required from: Arthur Heymans, Felix Held, Varshit Pandya.

Varshit Pandya has uploaded a new patch set (#12) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76501?usp=email )

Change subject: soc/amd/genoa: Add timer & tsc support
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soc/amd/genoa: Add timer & tsc support

Signed-off-by: Arthur Heymans 
Signed-off-by: Varshit Pandya 
Change-Id: Ie1ae2ba4d4833570ca0621023bdeed67ccabe5cb
---
M src/soc/amd/genoa/Kconfig
M src/soc/amd/genoa/Makefile.inc
A src/soc/amd/genoa/include/soc/msr.h
D src/soc/amd/genoa/timer.c
4 files changed, 43 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/76501/12