HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35966 )
Change subject: mb/biostar/am1ml: Use ite's common early_serial functions ......................................................................
mb/biostar/am1ml: Use ite's common early_serial functions
Change-Id: I0b1356420c9ae419b2a0a247b9dc6c8e92b7689a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/biostar/am1ml/romstage.c 1 file changed, 28 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/35966/1
diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c index 721df67..a93c978 100644 --- a/src/mainboard/biostar/am1ml/romstage.c +++ b/src/mainboard/biostar/am1ml/romstage.c @@ -24,8 +24,6 @@ #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h>
- -#define ITE_CONFIG_REG_CC 0x02 #define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) #define ENVC_DEV PNP_DEV(0x2e, IT8728F_EC) @@ -34,62 +32,40 @@ #define MMIO_NON_POSTED_END 0xfedfffff #define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x))
- -static void it_sio_write(pnp_devfn_t dev, u8 reg, u8 value) -{ - pnp_set_logical_device(dev); - pnp_write_config(dev, reg, value); -} - -static void ite_enter_conf(pnp_devfn_t dev) -{ - u16 port = dev >> 8; - - outb(0x87, port); - outb(0x01, port); - outb(0x55, port); - outb((port == 0x4e) ? 0xaa : 0x55, port); -} - -static void ite_exit_conf(pnp_devfn_t dev) -{ - it_sio_write(dev, ITE_CONFIG_REG_CC, 0x02); -} - static void ite_evc_conf(pnp_devfn_t dev) { - ite_enter_conf(dev); - it_sio_write(dev, 0xf1, 0x40); - it_sio_write(dev, 0xf4, 0x80); - it_sio_write(dev, 0xf5, 0x00); - it_sio_write(dev, 0xf6, 0xf0); - it_sio_write(dev, 0xf9, 0x48); - it_sio_write(dev, 0xfa, 0x00); - it_sio_write(dev, 0xfb, 0x00); - ite_exit_conf(dev); + pnp_enter_conf_state(dev); + ite_sio_write(dev, 0xf1, 0x40); + ite_sio_write(dev, 0xf4, 0x80); + ite_sio_write(dev, 0xf5, 0x00); + ite_sio_write(dev, 0xf6, 0xf0); + ite_sio_write(dev, 0xf9, 0x48); + ite_sio_write(dev, 0xfa, 0x00); + ite_sio_write(dev, 0xfb, 0x00); + pnp_exit_conf_state(dev); }
static void ite_gpio_conf(pnp_devfn_t dev) { - ite_enter_conf (dev); - it_sio_write(dev, 0x25, 0x80); - it_sio_write(dev, 0x26, 0x07); - it_sio_write(dev, 0x28, 0x81); - it_sio_write(dev, 0x2c, 0x06); - it_sio_write(dev, 0x72, 0x00); - it_sio_write(dev, 0x73, 0x00); - it_sio_write(dev, 0xb3, 0x01); - it_sio_write(dev, 0xb8, 0x00); - it_sio_write(dev, 0xc0, 0x00); - it_sio_write(dev, 0xc3, 0x00); - it_sio_write(dev, 0xc8, 0x00); - it_sio_write(dev, 0xc9, 0x07); - it_sio_write(dev, 0xcb, 0x01); - it_sio_write(dev, 0xf0, 0x10); - it_sio_write(dev, 0xf4, 0x27); - it_sio_write(dev, 0xf8, 0x20); - it_sio_write(dev, 0xf9, 0x01); - ite_exit_conf(dev); + pnp_enter_conf_state(dev); + ite_sio_write(dev, 0x25, 0x80); + ite_sio_write(dev, 0x26, 0x07); + ite_sio_write(dev, 0x28, 0x81); + ite_sio_write(dev, 0x2c, 0x06); + ite_sio_write(dev, 0x72, 0x00); + ite_sio_write(dev, 0x73, 0x00); + ite_sio_write(dev, 0xb3, 0x01); + ite_sio_write(dev, 0xb8, 0x00); + ite_sio_write(dev, 0xc0, 0x00); + ite_sio_write(dev, 0xc3, 0x00); + ite_sio_write(dev, 0xc8, 0x00); + ite_sio_write(dev, 0xc9, 0x07); + ite_sio_write(dev, 0xcb, 0x01); + ite_sio_write(dev, 0xf0, 0x10); + ite_sio_write(dev, 0xf4, 0x27); + ite_sio_write(dev, 0xf8, 0x20); + ite_sio_write(dev, 0xf9, 0x01); + pnp_exit_conf_state(dev); }
void board_BeforeAgesa(struct sysinfo *cb)
Hello Felix Held, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35966
to look at the new patch set (#2).
Change subject: mb/biostar/am1ml: Use ite's common early_serial functions ......................................................................
mb/biostar/am1ml: Use ite's common early_serial functions
Change-Id: I0b1356420c9ae419b2a0a247b9dc6c8e92b7689a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/biostar/am1ml/romstage.c M src/superio/ite/common/early_serial.c 2 files changed, 29 insertions(+), 53 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/35966/2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35966 )
Change subject: mb/biostar/am1ml: Use ite's common early_serial functions ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... File src/mainboard/biostar/am1ml/romstage.c:
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... PS2, Line 37: pnp_enter_conf_state(dev); you can use pnp_set_logical_device after the pnp_enter_conf_state call to switch to the LDN we want to write to here and then directly use pnp_write_config instead of ite_sio_write. since the LDN selection is sticky and doesn't reset after every read/write, it is sufficient to select the LDN once and don't need to do that for every register write to the same LDN
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... PS2, Line 50: pnp_enter_conf_state(dev); same here
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35966 )
Change subject: mb/biostar/am1ml: Use ite's common early_serial functions ......................................................................
Patch Set 2:
(2 comments)
Thank you
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... File src/mainboard/biostar/am1ml/romstage.c:
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... PS2, Line 37: pnp_enter_conf_state(dev);
you can use pnp_set_logical_device after the pnp_enter_conf_state call to switch to the LDN we want […]
Ack
https://review.coreboot.org/c/coreboot/+/35966/2/src/mainboard/biostar/am1ml... PS2, Line 50: pnp_enter_conf_state(dev);
same here
Ack
Hello Felix Held, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35966
to look at the new patch set (#3).
Change subject: mb/biostar/am1ml: Use ite's common functions ......................................................................
mb/biostar/am1ml: Use ite's common functions
Change-Id: I0b1356420c9ae419b2a0a247b9dc6c8e92b7689a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/biostar/am1ml/romstage.c 1 file changed, 30 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/35966/3
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35966 )
Change subject: mb/biostar/am1ml: Use ite's common functions ......................................................................
Patch Set 3: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35966 )
Change subject: mb/biostar/am1ml: Use ite's common functions ......................................................................
mb/biostar/am1ml: Use ite's common functions
Change-Id: I0b1356420c9ae419b2a0a247b9dc6c8e92b7689a Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/35966 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/biostar/am1ml/romstage.c 1 file changed, 30 insertions(+), 52 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved
diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c index 721df67..c83a865 100644 --- a/src/mainboard/biostar/am1ml/romstage.c +++ b/src/mainboard/biostar/am1ml/romstage.c @@ -24,8 +24,6 @@ #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h>
- -#define ITE_CONFIG_REG_CC 0x02 #define SERIAL_DEV PNP_DEV(0x2e, IT8728F_SP1) #define GPIO_DEV PNP_DEV(0x2e, IT8728F_GPIO) #define ENVC_DEV PNP_DEV(0x2e, IT8728F_EC) @@ -34,62 +32,42 @@ #define MMIO_NON_POSTED_END 0xfedfffff #define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x))
- -static void it_sio_write(pnp_devfn_t dev, u8 reg, u8 value) -{ - pnp_set_logical_device(dev); - pnp_write_config(dev, reg, value); -} - -static void ite_enter_conf(pnp_devfn_t dev) -{ - u16 port = dev >> 8; - - outb(0x87, port); - outb(0x01, port); - outb(0x55, port); - outb((port == 0x4e) ? 0xaa : 0x55, port); -} - -static void ite_exit_conf(pnp_devfn_t dev) -{ - it_sio_write(dev, ITE_CONFIG_REG_CC, 0x02); -} - static void ite_evc_conf(pnp_devfn_t dev) { - ite_enter_conf(dev); - it_sio_write(dev, 0xf1, 0x40); - it_sio_write(dev, 0xf4, 0x80); - it_sio_write(dev, 0xf5, 0x00); - it_sio_write(dev, 0xf6, 0xf0); - it_sio_write(dev, 0xf9, 0x48); - it_sio_write(dev, 0xfa, 0x00); - it_sio_write(dev, 0xfb, 0x00); - ite_exit_conf(dev); + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_write_config(dev, 0xf1, 0x40); + pnp_write_config(dev, 0xf4, 0x80); + pnp_write_config(dev, 0xf5, 0x00); + pnp_write_config(dev, 0xf6, 0xf0); + pnp_write_config(dev, 0xf9, 0x48); + pnp_write_config(dev, 0xfa, 0x00); + pnp_write_config(dev, 0xfb, 0x00); + pnp_exit_conf_state(dev); }
static void ite_gpio_conf(pnp_devfn_t dev) { - ite_enter_conf (dev); - it_sio_write(dev, 0x25, 0x80); - it_sio_write(dev, 0x26, 0x07); - it_sio_write(dev, 0x28, 0x81); - it_sio_write(dev, 0x2c, 0x06); - it_sio_write(dev, 0x72, 0x00); - it_sio_write(dev, 0x73, 0x00); - it_sio_write(dev, 0xb3, 0x01); - it_sio_write(dev, 0xb8, 0x00); - it_sio_write(dev, 0xc0, 0x00); - it_sio_write(dev, 0xc3, 0x00); - it_sio_write(dev, 0xc8, 0x00); - it_sio_write(dev, 0xc9, 0x07); - it_sio_write(dev, 0xcb, 0x01); - it_sio_write(dev, 0xf0, 0x10); - it_sio_write(dev, 0xf4, 0x27); - it_sio_write(dev, 0xf8, 0x20); - it_sio_write(dev, 0xf9, 0x01); - ite_exit_conf(dev); + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + pnp_write_config(dev, 0x25, 0x80); + pnp_write_config(dev, 0x26, 0x07); + pnp_write_config(dev, 0x28, 0x81); + pnp_write_config(dev, 0x2c, 0x06); + pnp_write_config(dev, 0x72, 0x00); + pnp_write_config(dev, 0x73, 0x00); + pnp_write_config(dev, 0xb3, 0x01); + pnp_write_config(dev, 0xb8, 0x00); + pnp_write_config(dev, 0xc0, 0x00); + pnp_write_config(dev, 0xc3, 0x00); + pnp_write_config(dev, 0xc8, 0x00); + pnp_write_config(dev, 0xc9, 0x07); + pnp_write_config(dev, 0xcb, 0x01); + pnp_write_config(dev, 0xf0, 0x10); + pnp_write_config(dev, 0xf4, 0x27); + pnp_write_config(dev, 0xf8, 0x20); + pnp_write_config(dev, 0xf9, 0x01); + pnp_exit_conf_state(dev); }
void board_BeforeAgesa(struct sysinfo *cb)
-
Felix Held (Code Review) -
HAOUAS Elyes (Code Review)