Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56808 )
Change subject: mb/pcengines/apu2/gpio_ftns.h: add comment about GPIO numbers ......................................................................
mb/pcengines/apu2/gpio_ftns.h: add comment about GPIO numbers
The mapping of the package GPIO numbers to the GPIO numbers on the GPIO controller isn't a 1:1 one, so add a comment about that to avoid confusion. Also change the comment style to match the style guide.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ie30bf5483ea2e2516d7e3fdd21ea9338362e526e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56808 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michał Żygowski michal.zygowski@3mdeb.com --- M src/mainboard/pcengines/apu2/gpio_ftns.h 1 file changed, 6 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Michał Żygowski: Looks good to me, approved
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.h b/src/mainboard/pcengines/apu2/gpio_ftns.h index 95c744f..6386220 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.h +++ b/src/mainboard/pcengines/apu2/gpio_ftns.h @@ -5,11 +5,12 @@
int get_spd_offset(void);
-// -// Based on PC Engines APU2C and APU3A schematics -// http://www.pcengines.ch/schema/apu2c.pdf -// http://www.pcengines.ch/schema/apu3a.pdf -// +/* + * Based on PC Engines APU2C and APU3A schematics + * http://www.pcengines.ch/schema/apu2c.pdf + * http://www.pcengines.ch/schema/apu3a.pdf + * Beware that the GPIO pin numbers on the package don't match the internal GPIO numbers + */ #define GPIO_22 0x09 // MODESW (APU5) #define GPIO_32 0x59 // MODESW (SIMSWAP2 on APU5) #define GPIO_33 0x5A // SIMSWAP (SIMSWAP3 on APU5)