Change in ...coreboot[master]: sb/intel/common/Makefile: Use the macro to link files in all stages

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Arthur Heymans (Code Review)

4 Jun 2019 4 Jun '19

2:54 p.m.

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33199

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/1

diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index ab5e5d8..dbc9c93 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -27,11 +27,7 @@ # CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build. subdirs-y += firmware

-verstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c +$(eval $(call add_to_all_stages,$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET),reset.c))

romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c @@ -42,10 +38,7 @@

ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)

-verstage-y += pmbase.c -romstage-y += pmbase.c -ramstage-y += pmbase.c -postcar-y += pmbase.c +$(eval $(call add_to_all_stages,y,pmbase.c)) smm-y += pmbase.c

bootblock-$(CONFIG_USBDEBUG) += usb_debug.c @@ -56,9 +49,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c

-romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c -postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c -ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c +$(eval $(call add_to_all_stages,$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI),spi.c)) ifeq ($(CONFIG_SPI_FLASH_SMM),y) smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c endif @@ -73,10 +64,6 @@

smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c

-verstage-y += rtc.c -romstage-y += rtc.c -ramstage-y += rtc.c -postcar-y += rtc.c -smm-y += rtc.c +$(eval $(call add_to_all_stages,y,rtc.c))

endif

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Arthur Heymans (Code Review)

6 Jun 6 Jun

5:18 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#2).

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/2

Arthur Heymans (Code Review)

5:19 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#3).

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/3

Arthur Heymans (Code Review)

5:54 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#4).

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/4

Arthur Heymans (Code Review)

10 Jun 10 Jun

5:48 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#6).

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/6

Arthur Heymans (Code Review)

6:37 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#7).

Change subject: sb/intel/common/Makefile: Use the macro to link files in all stages ......................................................................

sb/intel/common/Makefile: Use the macro to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/7

Arthur Heymans (Code Review)

15 Jun 15 Jun

10:45 p.m.

New subject: Change in ...coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#8).

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

sb/intel/common/Makefile: Use 'all' class to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/8

Arthur Heymans (Code Review)

13 Oct 13 Oct

11:37 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#10).

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

sb/intel/common/Makefile: Use 'all' class to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/10

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 10 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Nico Huber (Code Review)

19 Oct 19 Oct

8:25 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... File src/southbridge/intel/common/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... PS11, Line 70: smm-y += rtc.c Well, Jenkins doesn't seem to mind. But if this is intended, please mention it in the commit message.

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Nico Huber nico.h@gmx.de Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Sat, 19 Oct 2019 18:25:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Arthur Heymans (Code Review)

28 Oct 28 Oct

10:39 a.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... File src/southbridge/intel/common/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... PS11, Line 70: smm-y += rtc.c

...

Well, Jenkins doesn't seem to mind. But if this is intended, please mention it in the commit message.

Not intended. I think in previous versions smm was included in what was to work as 'all'

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Nico Huber nico.h@gmx.de Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Mon, 28 Oct 2019 09:39:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber nico.h@gmx.de Gerrit-MessageType: comment

Arthur Heymans (Code Review)

29 Oct 29 Oct

7:14 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Hello Patrick Rudolph, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33199

to look at the new patch set (#14).

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

sb/intel/common/Makefile: Use 'all' class to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

The RTC code is not included in SMM as it is unused there.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/33199/14

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Nico Huber nico.h@gmx.de Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Patrick Georgi (Code Review)

30 Oct 30 Oct

9:29 a.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

Patch Set 14: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Nico Huber nico.h@gmx.de Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 30 Oct 2019 08:29:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Nico Huber (Code Review)

10:36 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

Patch Set 14:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... File src/southbridge/intel/common/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/33199/11/src/southbridge/intel/comm... PS11, Line 70: smm-y += rtc.c

...

...
Well, Jenkins doesn't seem to mind. But if this is intended, please mention […]

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Nico Huber nico.h@gmx.de Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 30 Oct 2019 21:36:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans arthur@aheymans.xyz Comment-In-Reply-To: Nico Huber nico.h@gmx.de Gerrit-MessageType: comment

Nico Huber (Code Review)

10:37 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

Patch Set 14: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 30 Oct 2019 21:37:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Nico Huber (Code Review)

10:38 p.m.

New subject: Change in coreboot[master]: sb/intel/common/Makefile: Use 'all' class to link files in all stages

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/33199 )

Change subject: sb/intel/common/Makefile: Use 'all' class to link files in all stages ......................................................................

sb/intel/common/Makefile: Use 'all' class to link files in all stages

This links the reset function, the common pmbase functions and the spi driver in all stages.

The RTC code is not included in SMM as it is unused there.

Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33199 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com Reviewed-by: Nico Huber nico.h@gmx.de --- M src/southbridge/intel/common/Makefile.inc 1 file changed, 4 insertions(+), 18 deletions(-)

Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Nico Huber: Looks good to me, approved

diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index deab85f..e5a5a0c 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -16,11 +16,7 @@ # CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build. subdirs-y += firmware

-verstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c -postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c +all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET) += reset.c

romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS) += smbus.c @@ -31,10 +27,7 @@

ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)

-verstage-y += pmbase.c -romstage-y += pmbase.c -ramstage-y += pmbase.c -postcar-y += pmbase.c +all-y += pmbase.c smm-y += pmbase.c

bootblock-$(CONFIG_USBDEBUG) += usb_debug.c @@ -45,10 +38,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c

-bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c -romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c -postcar-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c -ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c +all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c ifeq ($(CONFIG_SPI_FLASH_SMM),y) smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI) += spi.c endif @@ -63,10 +53,6 @@

smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c

-verstage-y += rtc.c -romstage-y += rtc.c -ramstage-y += rtc.c -postcar-y += rtc.c -smm-y += rtc.c +all-y += rtc.c

endif

-- To view, visit https://review.coreboot.org/c/coreboot/+/33199 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I65926046d941df3121c7483d69c0b4f7003d783e Gerrit-Change-Number: 33199 Gerrit-PatchSet: 15 Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: Martin Roth martinroth@google.com Gerrit-Reviewer: Nico Huber nico.h@gmx.de Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

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Arthur Heymans (Code Review)
Nico Huber (Code Review)
Patrick Georgi (Code Review)